xen/arch/x86/boot/head.S: Use MAXPHYADDR fr MTRR masks in MLE capabilities

The bootloader should prepare the MTRR masks using MAXPHYADDRs. On modern
Intel platforms, the SINIT ACM forces this bit to be 1 according to
TXT MLE Software Development Guide Revision 017.4.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>

diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S
index 093f89485067d6a40cc515127261cfaf35a9044b..d1cb3202fc2f92269d0cc9c1b5426eba55e59048 100644 (file)
--- a/xen/arch/x86/boot/head.S
+++ b/xen/arch/x86/boot/head.S
@@ -128,7 +128,7 @@ mle_header:
         .long   0x00000000  /* First valid page of MLE */
         .long   0x00000000  /* Offset within binary of first byte of MLE */
         .long   (_end - start)  /* Offset within binary of last byte + 1 of MLE */
-        .long   0x00000223  /* Bit vector of MLE-supported capabilities */
+        .long   0x00000323  /* Bit vector of MLE-supported capabilities */
         .long   0x00000000  /* Starting linear address of command line (unused) */
         .long   0x00000000  /* Ending linear address of command line (unused) */