svm_intercept_msr(v, msr, MSR_INTERCEPT_WRITE);
}
-static void svm_set_icebp_interception(struct domain *d, bool enable)
-{
- const struct vcpu *v;
-
- for_each_vcpu ( d, v )
- {
- struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb;
- uint32_t intercepts = vmcb_get_general2_intercepts(vmcb);
-
- if ( enable )
- intercepts |= GENERAL2_INTERCEPT_ICEBP;
- else
- intercepts &= ~GENERAL2_INTERCEPT_ICEBP;
-
- vmcb_set_general2_intercepts(vmcb, intercepts);
- }
-}
-
static void svm_save_dr(struct vcpu *v)
{
struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb;
.msr_read_intercept = svm_msr_read_intercept,
.msr_write_intercept = svm_msr_write_intercept,
.enable_msr_interception = svm_enable_msr_interception,
- .set_icebp_interception = svm_set_icebp_interception,
.set_rdtsc_exiting = svm_set_rdtsc_exiting,
.set_descriptor_access_exiting = svm_set_descriptor_access_exiting,
.get_insn_bytes = svm_get_insn_bytes,
GENERAL2_INTERCEPT_STGI | GENERAL2_INTERCEPT_CLGI |
GENERAL2_INTERCEPT_SKINIT | GENERAL2_INTERCEPT_MWAIT |
GENERAL2_INTERCEPT_WBINVD | GENERAL2_INTERCEPT_MONITOR |
- GENERAL2_INTERCEPT_XSETBV;
+ GENERAL2_INTERCEPT_XSETBV | GENERAL2_INTERCEPT_ICEBP;
/* Intercept all debug-register writes. */
vmcb->_dr_intercepts = ~0u;
ad->monitor.debug_exception_sync = requested_status ?
mop->u.debug_exception.sync :
0;
-
- hvm_set_icebp_interception(d, requested_status);
-
domain_unpause(d);
break;
}
bool_t access_w, bool_t access_x);
void (*enable_msr_interception)(struct domain *d, uint32_t msr);
- void (*set_icebp_interception)(struct domain *d, bool enable);
bool_t (*is_singlestep_supported)(void);
/* Alternate p2m */
return 0;
}
-static inline bool hvm_set_icebp_interception(struct domain *d, bool enable)
-{
- if ( hvm_funcs.set_icebp_interception )
- {
- hvm_funcs.set_icebp_interception(d, enable);
- return true;
- }
- return false;
-}
-
static inline bool_t hvm_is_singlestep_supported(void)
{
return (hvm_funcs.is_singlestep_supported &&