clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h

Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h for making
the code to be common.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/drivers/clk/starfive/clk-starfive-jh7100-audio.c b/drivers/clk/starfive/clk-starfive-jh7100-audio.c
index 8473a65e219be732f8f2c6e9d67149ed2f4d03ae..db0d9533bd9c60a46de1ca497a7630113810cc71 100644 (file)
--- a/drivers/clk/starfive/clk-starfive-jh7100-audio.c
+++ b/drivers/clk/starfive/clk-starfive-jh7100-audio.c
@@ -16,7 +16,7 @@
 
 #include <dt-bindings/clock/starfive-jh7100-audio.h>
 
-#include "clk-starfive-jh7100.h"
+#include "clk-starfive-jh71x0.h"
 
 /* external clocks */
 #define JH7100_AUDCLK_AUDIO_SRC                        (JH7100_AUDCLK_END + 0)

diff --git a/drivers/clk/starfive/clk-starfive-jh7100.c b/drivers/clk/starfive/clk-starfive-jh7100.c
index eea52f16af0d8e4a135f3e24a1cb05086f51bcd5..662eb8f74c120688cb85f7343bdee28cb7332ceb 100644 (file)
--- a/drivers/clk/starfive/clk-starfive-jh7100.c
+++ b/drivers/clk/starfive/clk-starfive-jh7100.c
@@ -15,7 +15,7 @@
 
 #include <dt-bindings/clock/starfive-jh7100.h>
 
-#include "clk-starfive-jh7100.h"
+#include "clk-starfive-jh71x0.h"
 
 /* external clocks */
 #define JH7100_CLK_OSC_SYS             (JH7100_CLK_END + 0)

diff --git a/drivers/clk/starfive/clk-starfive-jh7100.h b/drivers/clk/starfive/clk-starfive-jh7100.h
deleted file mode 100644 (file)
index a8ba6e2..0000000
--- a/drivers/clk/starfive/clk-starfive-jh7100.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-#ifndef __CLK_STARFIVE_JH7100_H
-#define __CLK_STARFIVE_JH7100_H
-
-#include <linux/bits.h>
-#include <linux/clk-provider.h>
-#include <linux/device.h>
-#include <linux/spinlock.h>
-
-/* register fields */
-#define JH7100_CLK_ENABLE      BIT(31)
-#define JH7100_CLK_INVERT      BIT(30)
-#define JH7100_CLK_MUX_MASK    GENMASK(27, 24)
-#define JH7100_CLK_MUX_SHIFT   24
-#define JH7100_CLK_DIV_MASK    GENMASK(23, 0)
-#define JH7100_CLK_FRAC_MASK   GENMASK(15, 8)
-#define JH7100_CLK_FRAC_SHIFT  8
-#define JH7100_CLK_INT_MASK    GENMASK(7, 0)
-
-/* fractional divider min/max */
-#define JH7100_CLK_FRAC_MIN    100UL
-#define JH7100_CLK_FRAC_MAX    25599UL
-
-/* clock data */
-struct jh7100_clk_data {
-       const char *name;
-       unsigned long flags;
-       u32 max;
-       u8 parents[4];
-};
-
-#define JH7100_GATE(_idx, _name, _flags, _parent) [_idx] = {                   \
-       .name = _name,                                                          \
-       .flags = CLK_SET_RATE_PARENT | (_flags),                                \
-       .max = JH7100_CLK_ENABLE,                                               \
-       .parents = { [0] = _parent },                                           \
-}
-
-#define JH7100__DIV(_idx, _name, _max, _parent) [_idx] = {                     \
-       .name = _name,                                                          \
-       .flags = 0,                                                             \
-       .max = _max,                                                            \
-       .parents = { [0] = _parent },                                           \
-}
-
-#define JH7100_GDIV(_idx, _name, _flags, _max, _parent) [_idx] = {             \
-       .name = _name,                                                          \
-       .flags = _flags,                                                        \
-       .max = JH7100_CLK_ENABLE | (_max),                                      \
-       .parents = { [0] = _parent },                                           \
-}
-
-#define JH7100_FDIV(_idx, _name, _parent) [_idx] = {                           \
-       .name = _name,                                                          \
-       .flags = 0,                                                             \
-       .max = JH7100_CLK_FRAC_MAX,                                             \
-       .parents = { [0] = _parent },                                           \
-}
-
-#define JH7100__MUX(_idx, _name, _nparents, ...) [_idx] = {                    \
-       .name = _name,                                                          \
-       .flags = 0,                                                             \
-       .max = ((_nparents) - 1) << JH7100_CLK_MUX_SHIFT,                       \
-       .parents = { __VA_ARGS__ },                                             \
-}
-
-#define JH7100_GMUX(_idx, _name, _flags, _nparents, ...) [_idx] = {            \
-       .name = _name,                                                          \
-       .flags = _flags,                                                        \
-       .max = JH7100_CLK_ENABLE |                                              \
-               (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT),                    \
-       .parents = { __VA_ARGS__ },                                             \
-}
-
-#define JH7100_MDIV(_idx, _name, _max, _nparents, ...) [_idx] = {              \
-       .name = _name,                                                          \
-       .flags = 0,                                                             \
-       .max = (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT) | (_max),            \
-       .parents = { __VA_ARGS__ },                                             \
-}
-
-#define JH7100__GMD(_idx, _name, _flags, _max, _nparents, ...) [_idx] = {      \
-       .name = _name,                                                          \
-       .flags = _flags,                                                        \
-       .max = JH7100_CLK_ENABLE |                                              \
-               (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT) | (_max),           \
-       .parents = { __VA_ARGS__ },                                             \
-}
-
-#define JH7100__INV(_idx, _name, _parent) [_idx] = {                           \
-       .name = _name,                                                          \
-       .flags = CLK_SET_RATE_PARENT,                                           \
-       .max = JH7100_CLK_INVERT,                                               \
-       .parents = { [0] = _parent },                                           \
-}
-
-struct jh7100_clk {
-       struct clk_hw hw;
-       unsigned int idx;
-       unsigned int max_div;
-};
-
-struct jh7100_clk_priv {
-       /* protect clk enable and set rate/parent from happening at the same time */
-       spinlock_t rmw_lock;
-       struct device *dev;
-       void __iomem *base;
-       struct clk_hw *pll[3];
-       struct jh7100_clk reg[];
-};
-
-const struct clk_ops *starfive_jh7100_clk_ops(u32 max);
-
-#endif

diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c b/drivers/clk/starfive/clk-starfive-jh71x0.c
index 6c07b61b4a32ce6ec5ea205e0fceaf40248ca3bc..0140bdf27a013590ccb87b264f019c147b66e302 100644 (file)
--- a/drivers/clk/starfive/clk-starfive-jh71x0.c
+++ b/drivers/clk/starfive/clk-starfive-jh71x0.c
@@ -10,7 +10,7 @@
 #include <linux/device.h>
 #include <linux/io.h>
 
-#include "clk-starfive-jh7100.h"
+#include "clk-starfive-jh71x0.h"
 
 static struct jh7100_clk *jh7100_clk_from(struct clk_hw *hw)
 {

diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.h b/drivers/clk/starfive/clk-starfive-jh71x0.h
new file mode 100644 (file)
index 0000000..a8ba6e2
--- /dev/null
+++ b/drivers/clk/starfive/clk-starfive-jh71x0.h
@@ -0,0 +1,114 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __CLK_STARFIVE_JH7100_H
+#define __CLK_STARFIVE_JH7100_H
+
+#include <linux/bits.h>
+#include <linux/clk-provider.h>
+#include <linux/device.h>
+#include <linux/spinlock.h>
+
+/* register fields */
+#define JH7100_CLK_ENABLE      BIT(31)
+#define JH7100_CLK_INVERT      BIT(30)
+#define JH7100_CLK_MUX_MASK    GENMASK(27, 24)
+#define JH7100_CLK_MUX_SHIFT   24
+#define JH7100_CLK_DIV_MASK    GENMASK(23, 0)
+#define JH7100_CLK_FRAC_MASK   GENMASK(15, 8)
+#define JH7100_CLK_FRAC_SHIFT  8
+#define JH7100_CLK_INT_MASK    GENMASK(7, 0)
+
+/* fractional divider min/max */
+#define JH7100_CLK_FRAC_MIN    100UL
+#define JH7100_CLK_FRAC_MAX    25599UL
+
+/* clock data */
+struct jh7100_clk_data {
+       const char *name;
+       unsigned long flags;
+       u32 max;
+       u8 parents[4];
+};
+
+#define JH7100_GATE(_idx, _name, _flags, _parent) [_idx] = {                   \
+       .name = _name,                                                          \
+       .flags = CLK_SET_RATE_PARENT | (_flags),                                \
+       .max = JH7100_CLK_ENABLE,                                               \
+       .parents = { [0] = _parent },                                           \
+}
+
+#define JH7100__DIV(_idx, _name, _max, _parent) [_idx] = {                     \
+       .name = _name,                                                          \
+       .flags = 0,                                                             \
+       .max = _max,                                                            \
+       .parents = { [0] = _parent },                                           \
+}
+
+#define JH7100_GDIV(_idx, _name, _flags, _max, _parent) [_idx] = {             \
+       .name = _name,                                                          \
+       .flags = _flags,                                                        \
+       .max = JH7100_CLK_ENABLE | (_max),                                      \
+       .parents = { [0] = _parent },                                           \
+}
+
+#define JH7100_FDIV(_idx, _name, _parent) [_idx] = {                           \
+       .name = _name,                                                          \
+       .flags = 0,                                                             \
+       .max = JH7100_CLK_FRAC_MAX,                                             \
+       .parents = { [0] = _parent },                                           \
+}
+
+#define JH7100__MUX(_idx, _name, _nparents, ...) [_idx] = {                    \
+       .name = _name,                                                          \
+       .flags = 0,                                                             \
+       .max = ((_nparents) - 1) << JH7100_CLK_MUX_SHIFT,                       \
+       .parents = { __VA_ARGS__ },                                             \
+}
+
+#define JH7100_GMUX(_idx, _name, _flags, _nparents, ...) [_idx] = {            \
+       .name = _name,                                                          \
+       .flags = _flags,                                                        \
+       .max = JH7100_CLK_ENABLE |                                              \
+               (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT),                    \
+       .parents = { __VA_ARGS__ },                                             \
+}
+
+#define JH7100_MDIV(_idx, _name, _max, _nparents, ...) [_idx] = {              \
+       .name = _name,                                                          \
+       .flags = 0,                                                             \
+       .max = (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT) | (_max),            \
+       .parents = { __VA_ARGS__ },                                             \
+}
+
+#define JH7100__GMD(_idx, _name, _flags, _max, _nparents, ...) [_idx] = {      \
+       .name = _name,                                                          \
+       .flags = _flags,                                                        \
+       .max = JH7100_CLK_ENABLE |                                              \
+               (((_nparents) - 1) << JH7100_CLK_MUX_SHIFT) | (_max),           \
+       .parents = { __VA_ARGS__ },                                             \
+}
+
+#define JH7100__INV(_idx, _name, _parent) [_idx] = {                           \
+       .name = _name,                                                          \
+       .flags = CLK_SET_RATE_PARENT,                                           \
+       .max = JH7100_CLK_INVERT,                                               \
+       .parents = { [0] = _parent },                                           \
+}
+
+struct jh7100_clk {
+       struct clk_hw hw;
+       unsigned int idx;
+       unsigned int max_div;
+};
+
+struct jh7100_clk_priv {
+       /* protect clk enable and set rate/parent from happening at the same time */
+       spinlock_t rmw_lock;
+       struct device *dev;
+       void __iomem *base;
+       struct clk_hw *pll[3];
+       struct jh7100_clk reg[];
+};
+
+const struct clk_ops *starfive_jh7100_clk_ops(u32 max);
+
+#endif