plat/kvm/arm: Use 48-bit virtual addressing for PARange >= 52

Latest versions of QEMU (>= 7) might provide a 52-bit physical address
space when passing `max` as the `cpu` option. This information is found
in the `PARange` field of the `ID_AA64MMFR0_EL1` register.

When the Virtual Memory API is not enabled (i.e. the `CONFIG_PAGING`
macro is not set), the `T0SZ` field from the `TCR_EL1` register is set
up such that the VA space size matches the PA one.  However, we
currently do not provide a 5-level paging scheme at all in order to
implement 52-bit virtual addresing, so we need to enforce 48-bit VA space
for PARange >= 52.

Signed-off-by: Eduard Vintilă <eduard.vintila47@gmail.com>
Reviewed-by: Michalis Pappas <michalis@unikraft.io>
Approved-by: Razvan Deaconescu <razvand@unikraft.io>
Tested-by: Unikraft CI <monkey@unikraft.io>
GitHub-Closes: #729

diff --git a/plat/kvm/arm/pagetable64.S b/plat/kvm/arm/pagetable64.S
index 2208a91abdde23161b1a2410a677510c91cf8072..ce77de6a0e9ac666b3c816373a6a899ebbaf3634 100644 (file)
--- a/plat/kvm/arm/pagetable64.S
+++ b/plat/kvm/arm/pagetable64.S
@@ -70,7 +70,15 @@ ENTRY(start_mmu)
        ldr x5, =tcr_ips_bits
        ubfx x4, x3, #0, #4
        ldrb w4, [x5, x4]
-
+       cmp x4, #52
+       b.lt setup_tcr_el1
+       /*
+        * We currently do not provide 5-level page tables used in
+        * implementing 52-bit virtual addresing with 4K granularity, so we
+        * enforce the max VA to 48-bit for PARange >= 52.
+        */
+       mov x4, #48
+setup_tcr_el1:
        /* Setup TCR_EL1_TxSZ(64 - VIRT_BITS) for TCR_INIT_FLAGS */
        mov x5, #64
        sub x5, x5, x4