x86: don't flush the whole cache when changing cachability

Introduce the FLUSH_VA_VALID flag to flush_area_mask() and friends to
say that it is safe to use CLFLUSH (i.e., the virtual address is still
valid).

Use this when changing the cachability of the Xen direct mappings (in
response to the guest changing the cachability of its mappings). This
significantly improves performance by avoiding an expensive WBINVD.

This fixes a performance regression introduced by
c61a6f74f80eb36ed83a82f713db3143159b9009 (x86: enforce consistent
cachability of MMIO mappings), the fix for XSA-154.

e.g., A set_memory_wc() call in Linux:

before: 4097 us
after:    47 us

Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/arch/x86/flushtlb.c b/xen/arch/x86/flushtlb.c
index 582a1e254fe79829c05b4e9ba292380510dd2fe4..ee61aab1ca9bb75971606fdb0b95005ea6524958 100644 (file)
--- a/xen/arch/x86/flushtlb.c
+++ b/xen/arch/x86/flushtlb.c
@@ -140,7 +140,8 @@ unsigned int flush_area_local(const void *va, unsigned int flags)
         if ( order < (BITS_PER_LONG - PAGE_SHIFT) )
             sz = 1UL << (order + PAGE_SHIFT);
 
-        if ( !(flags & (FLUSH_TLB|FLUSH_TLB_GLOBAL)) &&
+        if ( (!(flags & (FLUSH_TLB|FLUSH_TLB_GLOBAL)) ||
+              (flags & FLUSH_VA_VALID)) &&
              c->x86_clflush_size && c->x86_cache_size && sz &&
              ((sz >> 10) < c->x86_cache_size) )
         {

diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c
index 36c44873c283e65b434249fa5749387342fa6acb..c997b5352f3bf8af0e2475d57b368647eb7b831b 100644 (file)
--- a/xen/arch/x86/mm.c
+++ b/xen/arch/x86/mm.c
@@ -5641,7 +5641,12 @@ int map_pages_to_xen(
         flush_flags |= FLUSH_TLB_GLOBAL;       \
     if ( (flags & _PAGE_PRESENT) &&            \
          (((o_) ^ flags) & PAGE_CACHE_ATTRS) ) \
+    {                                          \
         flush_flags |= FLUSH_CACHE;            \
+        if ( virt >= DIRECTMAP_VIRT_START &&   \
+             virt < HYPERVISOR_VIRT_END )      \
+            flush_flags |= FLUSH_VA_VALID;     \
+    }                                          \
 } while (0)
 
     while ( nr_mfns != 0 )

diff --git a/xen/include/asm-x86/flushtlb.h b/xen/include/asm-x86/flushtlb.h
index 4ea31c2c0e8369f995fd2478acb3787f5fb1ea24..2e7ed6b56204021d456af411f6d5bec325856c17 100644 (file)
--- a/xen/include/asm-x86/flushtlb.h
+++ b/xen/include/asm-x86/flushtlb.h
@@ -85,6 +85,8 @@ void write_cr3(unsigned long cr3);
 #define FLUSH_TLB_GLOBAL 0x200
  /* Flush data caches */
 #define FLUSH_CACHE      0x400
+ /* VA for the flush has a valid mapping */
+#define FLUSH_VA_VALID   0x800
 
 /* Flush local TLBs/caches. */
 unsigned int flush_area_local(const void *va, unsigned int flags);