x86/cpuid: minor fixups missed from previous work

 * Add more feature names to ./xen-cpuid
 * Vertically align the magic comments in cpufeatureset.h

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
Release-acked-by: Julien Grall <julien.grall@linaro.org>

diff --git a/tools/misc/xen-cpuid.c b/tools/misc/xen-cpuid.c
index 106be0f8a387c5c47887963c4a1c8ac939e4dc23..0831f7551d16b3bf62018e0deafed66b092dc709 100644 (file)
--- a/tools/misc/xen-cpuid.c
+++ b/tools/misc/xen-cpuid.c
@@ -95,7 +95,7 @@ static const char *str_7b0[32] =
     [ 0] = "fsgsbase", [ 1] = "tsc-adj",
     [ 2] = "sgx",      [ 3] = "bmi1",
     [ 4] = "hle",      [ 5] = "avx2",
-    [ 6] = "REZ",      [ 7] = "smep",
+    [ 6] = "fdp_exn",  [ 7] = "smep",
     [ 8] = "bmi2",     [ 9] = "erms",
     [10] = "invpcid",  [11] = "rtm",
     [12] = "pqm",      [13] = "depfpp",
@@ -121,23 +121,28 @@ static const char *str_Da1[32] =
 static const char *str_7c0[32] =
 {
     [ 0] = "prechwt1", [ 1] = "avx512vbmi",
-    [ 2] = "REZ",      [ 3] = "pku",
+    [ 2] = "umip",     [ 3] = "pku",
     [ 4] = "ospke",
 
     [5 ... 13] = "REZ",
 
     [14] = "avx512_vpopcntdq",
 
-    [15 ... 31] = "REZ",
+    [15 ... 21] = "REZ",
+
+    [22] = "rdpid",
+
+    [23 ... 31] = "REZ",
 };
 
 static const char *str_e7d[32] =
 {
     [0 ... 7] = "REZ",
 
-    [ 8] = "itsc",
+    [ 8] = "itsc",     [ 9] = "REZ",
+    [10] = "efro",
 
-    [9 ... 31] = "REZ",
+    [11 ... 31] = "REZ",
 };
 
 static const char *str_e8b[32] =

diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h
index 0ee3ea350fc99cd499460bbcbcad4d05575a5612..be6da8eaf17cb115146c5f630603b513d1e45034 100644 (file)
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -239,8 +239,8 @@ XEN_CPUFEATURE(EFRO,          7*32+10) /*   APERF/MPERF Read Only interface */
 XEN_CPUFEATURE(CLZERO,        8*32+ 0) /*A  CLZERO instruction */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:0.edx, word 9 */
-XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) /*A AVX512 Neural Network Instructions */
-XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A AVX512 Multiply Accumulation Single Precision */
+XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) /*A  AVX512 Neural Network Instructions */
+XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A  AVX512 Multiply Accumulation Single Precision */
 
 #endif /* XEN_CPUFEATURE */