The ESP FIFO is used as a buffer for DMA requests and so isn't guaranteed to
be empty in the case of SCSI errors or a mixed DMA/non-DMA request. Flush the
FIFO before sending a SCSI command to guarantee that it is correctly
positioned at the start of the FIFO.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <
20230807065300.366070-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
#define ESP_DMA_WMAC 0x58c
#define ESP_CMD_DMA 0x80
+#define ESP_CMD_FLUSH 0x01
#define ESP_CMD_RESET 0x02
#define ESP_CMD_TI 0x10
#define ESP_CMD_ICCS 0x11
outb(target, iobase + ESP_WBUSID);
+ /* Clear FIFO before sending command. */
+ outb(ESP_CMD_FLUSH, iobase + ESP_CMD);
+
/*
* We need to pass the LUN at the beginning of the command, and the FIFO
* is only 16 bytes, so we cannot support 16-byte CDBs. The alternative