]> xenbits.xensource.com Git - xen.git/commitdiff
Calculation of MSI-X table size needs to be masked.
authorKeir Fraser <keir.fraser@citrix.com>
Mon, 5 May 2008 09:12:44 +0000 (10:12 +0100)
committerKeir Fraser <keir.fraser@citrix.com>
Mon, 5 May 2008 09:12:44 +0000 (10:12 +0100)
Signed-off-by: Espen Skoglund <espen.skoglund@netronome.com>
tools/python/xen/util/pci.py

index ad46eb3c0b4b0bac617c611280639934ee571be3..d70a998b2533a7c5497d2b451eb3b4c1dbea0430 100644 (file)
@@ -30,6 +30,7 @@ PCI_STATUS_CAP_MASK = 0x10
 PCI_STATUS_OFFSET = 0x6
 PCI_CAP_OFFSET = 0x34
 MSIX_BIR_MASK = 0x7
+MSIX_SIZE_MASK = 0x3ff
 
 #Calculate PAGE_SHIFT: number of bits to shift an address to get the page number
 PAGE_SIZE = resource.getpagesize()
@@ -120,8 +121,9 @@ class PciDevice:
                         message_cont_lo = ord(conf_file.read(1))
                         message_cont_hi = ord(conf_file.read(1))
                         self.msix=1
-                        self.msix_entries = message_cont_lo + \
-                                            message_cont_hi << 8
+                        self.msix_entries = (message_cont_lo + \
+                                             message_cont_hi << 8) \
+                                             & MSIX_SIZE_MASK
                         t_off=conf_file.read(4)
                         p_off=conf_file.read(4)
                         self.table_offset=ord(t_off[0]) | (ord(t_off[1])<<8) | \