]> xenbits.xensource.com Git - qemu-xen.git/commitdiff
net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg
authorSai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Tue, 12 May 2020 14:54:51 +0000 (20:24 +0530)
committerJason Wang <jasowang@redhat.com>
Thu, 18 Jun 2020 13:05:51 +0000 (21:05 +0800)
Advertise support of clear-on-read for ISR registers.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
hw/net/cadence_gem.c

index 8e927ada73c892bbd0453f1a7127678e1ba89c13..2211550d2ba55201a1d4e9f8ec31aef7de800067 100644 (file)
@@ -1371,7 +1371,7 @@ static void gem_reset(DeviceState *d)
     s->regs[GEM_TXPARTIALSF] = 0x000003ff;
     s->regs[GEM_RXPARTIALSF] = 0x000003ff;
     s->regs[GEM_MODID] = s->revision;
-    s->regs[GEM_DESCONF] = 0x02500111;
+    s->regs[GEM_DESCONF] = 0x02D00111;
     s->regs[GEM_DESCONF2] = 0x2ab10000 | s->jumbo_max_len;
     s->regs[GEM_DESCONF5] = 0x002f2045;
     s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK;