More agressive dcache flush.

diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index d89261e634ab1bcf005988fe64873c2572a0e909..8bcc88e7122577d0505fd1c82738c0af42d4e419 100644 (file)
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -260,9 +260,11 @@ static inline void flush_xen_dcache_va_range(void *p, unsigned long size)
 {
     void *end;
     dsb();           /* So the CPU issues all writes to the range */
+    isb();
     for ( end = p + size; p < end; p += cacheline_bytes )
         WRITE_CP32((uint32_t) p, DCCMVAC);
     dsb();           /* So we know the flushes happen before continuing */
+    isb();
 }
 
 /* Macro for flushing a single small item.  The predicate is always