When using posted interrupts on Intel hardware it's possible that the
vCPU resumes execution with a stale local APIC IRR register because
depending on the interrupts to be injected vlapic_has_pending_irq
might not be called, and thus PIR won't be synced into IRR.
Fix this by making sure PIR is always synced to IRR in
hvm_vcpu_has_pending_irq regardless of what interrupts are pending.
Reported-by: Joe Jin <joe.jin@oracle.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Tested-by: Joe Jin <joe.jin@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
master commit:
56348df32bbc782e63b6e3fb978b80e015ae76e7
master date: 2019-11-28 11:58:25 +0100
struct hvm_domain *plat = &v->domain->arch.hvm_domain;
int vector;
+ /*
+ * Always call vlapic_sync_pir_to_irr so that PIR is synced into IRR when
+ * using posted interrupts. Note this is also done by
+ * vlapic_has_pending_irq but depending on which interrupts are pending
+ * hvm_vcpu_has_pending_irq will return early without calling
+ * vlapic_has_pending_irq.
+ */
+ vlapic_sync_pir_to_irr(v);
+
if ( unlikely(v->nmi_pending) )
return hvm_intack_nmi;
static int vlapic_find_highest_irr(struct vlapic *vlapic)
{
- if ( hvm_funcs.sync_pir_to_irr )
- hvm_funcs.sync_pir_to_irr(vlapic_vcpu(vlapic));
+ vlapic_sync_pir_to_irr(vlapic_vcpu(vlapic));
return vlapic_find_highest_vector(&vlapic->regs->data[APIC_IRR]);
}
for_each_vcpu ( d, v )
{
- if ( hvm_funcs.sync_pir_to_irr )
- hvm_funcs.sync_pir_to_irr(v);
+ vlapic_sync_pir_to_irr(v);
s = vcpu_vlapic(v);
if ( (rc = hvm_save_entry(LAPIC_REGS, v->vcpu_id, h, s->regs)) != 0 )
const struct vlapic *target, const struct vlapic *source,
int short_hand, uint32_t dest, bool_t dest_mode);
+static inline void vlapic_sync_pir_to_irr(struct vcpu *v)
+{
+ if ( hvm_funcs.sync_pir_to_irr )
+ hvm_funcs.sync_pir_to_irr(v);
+}
+
#endif /* __ASM_X86_HVM_VLAPIC_H__ */