]> xenbits.xensource.com Git - xenclient/ioemu.git/commitdiff
The linesize changes doesn't work for an external monitor because the
authorJean Guyader <jean.guyader@eu.citrix.com>
Mon, 15 Dec 2008 14:50:10 +0000 (14:50 +0000)
committerJean Guyader <jean.guyader@eu.citrix.com>
Mon, 15 Dec 2008 14:50:10 +0000 (14:50 +0000)
register that controls the external monitor FB are the pipeb registers.

This patches recognizes if pipeb is enabled and in this case it changes
the linesize for dspb too.

intel.c

diff --git a/intel.c b/intel.c
index 2ec6a243425abcd369b34f69efcb438266279398..cfdb020638fa85c8e845eda1e157c06a0caaf851 100644 (file)
--- a/intel.c
+++ b/intel.c
 #define REG_DR_DSPASTRIDE       0x70188
 #define REG_DR_PIPEACONF       0x70008
 
+#define REG_DR_DSPBSURF         0x7119C
+#define REG_DR_DSPBCNTR         0x71180
+#define REG_DR_DSPBSTRIDE       0x71188
+#define REG_DR_PIPEBCONF0x71008
+
 extern int                      vga_passthrough;
 uint32_t                        guest_framebuffer;
 
@@ -100,7 +105,14 @@ static void intel_force_linear(int linesize)
     unsigned int *pipeaconf = (unsigned int *)(intel_mmio + REG_DR_PIPEACONF);
     unsigned int *dspasurf = (unsigned int *)(intel_mmio + REG_DR_DSPASURF);
     unsigned int *dspastride = (unsigned int *)(intel_mmio + REG_DR_DSPASTRIDE);
-    unsigned int surf, pipea;
+
+    unsigned int *dspbcntr = (unsigned int *)(intel_mmio + REG_DR_DSPBCNTR);
+    unsigned int *pipebconf = (unsigned int *)(intel_mmio + REG_DR_PIPEBCONF);
+    unsigned int *dspbsurf = (unsigned int *)(intel_mmio + REG_DR_DSPBSURF);
+    unsigned int *dspbstride = (unsigned int *)(intel_mmio + REG_DR_DSPBSTRIDE);
+
+    unsigned int surfa, surfb, pipea, pipeb;
+    char pipebenabled = !!(*pipebconf & (1 << 30));
 
 
     INTEL_DEBUG("DSPASURF CTRL: 0x%x\n", intel_get_reg(REG_DR_DSPACNTR));
@@ -110,22 +122,47 @@ static void intel_force_linear(int linesize)
     *pipeaconf &= ~(0x3 << 18);
     *dspacntr |= (1 << 31);
     /* Address of the surface to map to */
-    surf = *dspasurf;
+    surfa = *dspasurf;
     *dspasurf = 0x00000000;
     *dspacntr &= ~(1 << 31);
     *dspasurf = 0x00000000;
     *pipeaconf |= pipea;
 
+    if (pipebenabled) {
+        INTEL_DEBUG("PIPEBCONF enabled.\n");
+
+        /* Disable surface */
+        pipeb = *pipebconf & (0x3 << 18);
+        *pipebconf &= ~(0x3 << 18);
+        *dspbcntr |= (1 << 31);
+        /* Address of the surface to map to */
+        surfb = *dspbsurf;
+        *dspbsurf = 0x00000000;
+        *dspbcntr &= ~(1 << 31);
+        *dspbsurf = 0x00000000;
+        *pipebconf |= pipeb;
+    }
+
     usleep(20000);
 
     *pipeaconf &= ~(0x3 << 18);
     /* Enable surface linear mode */
     *dspacntr &= ~(1 << 10);
     if (linesize) *dspastride = linesize;
-    *dspasurf = surf;
+    *dspasurf = surfa;
     *dspacntr |= (1 << 31);
     *pipeaconf |= pipea;
 
+    if (pipebenabled) {
+        *pipebconf &= ~(0x3 << 18);
+        /* Enable surface linear mode */
+        *dspbcntr &= ~(1 << 10);
+        if (linesize) *dspbstride = linesize;
+        *dspbsurf = surfb;
+        *dspbcntr |= (1 << 31);
+        *pipebconf |= pipeb;
+    }
+
     usleep(20000);
 }