int __init dom0_setup_permissions(struct domain *d)
{
unsigned long mfn;
- unsigned int i;
+ unsigned int i, offs;
int rc;
if ( pv_shim )
/* Modify I/O port access permissions. */
- /* Master Interrupt Controller (PIC). */
- rc |= ioports_deny_access(d, 0x20, 0x21);
- /* Slave Interrupt Controller (PIC). */
- rc |= ioports_deny_access(d, 0xA0, 0xA1);
+ for ( offs = 0, i = ISOLATE_LSB(i8259A_alias_mask) ?: 2;
+ offs <= i8259A_alias_mask; offs += i )
+ {
+ if ( offs & ~i8259A_alias_mask )
+ continue;
+ /* Master Interrupt Controller (PIC). */
+ rc |= ioports_deny_access(d, 0x20 + offs, 0x21 + offs);
+ /* Slave Interrupt Controller (PIC). */
+ rc |= ioports_deny_access(d, 0xA0 + offs, 0xA1 + offs);
+ }
/* ELCR of both PICs. */
rc |= ioports_deny_access(d, 0x4D0, 0x4D1);
#include <xen/delay.h>
#include <asm/apic.h>
#include <asm/asm_defns.h>
+#include <asm/setup.h>
#include <io_ports.h>
#include <irq_vectors.h>
irq_to_desc(irq)->handler = &i8259A_irq_type;
}
+unsigned int __initdata i8259A_alias_mask;
+
+static void __init probe_8259A_alias(void)
+{
+ unsigned int mask = 0x1e;
+ uint8_t val = 0;
+
+ if ( !opt_probe_port_aliases )
+ return;
+
+ /*
+ * The only properly r/w register is OCW1. While keeping the master
+ * fully masked (thus also masking anything coming through the slave),
+ * write all possible 256 values to the slave's base port, and check
+ * whether the same value can then be read back through any of the
+ * possible alias ports. Probing just the slave of course builds on the
+ * assumption that aliasing is identical for master and slave.
+ */
+
+ outb(0xff, 0x21); /* Fully mask master. */
+
+ do {
+ unsigned int offs;
+
+ outb(val, 0xa1);
+
+ /* Try to make sure we're actually having a PIC here. */
+ if ( inb(0xa1) != val )
+ {
+ mask = 0;
+ break;
+ }
+
+ for ( offs = ISOLATE_LSB(mask); offs <= mask; offs <<= 1 )
+ {
+ if ( !(mask & offs) )
+ continue;
+ if ( inb(0xa1 + offs) != val )
+ mask &= ~offs;
+ }
+ } while ( mask && (val += 0x0d) ); /* Arbitrary uneven number. */
+
+ outb(cached_A1, 0xa1); /* Restore slave IRQ mask. */
+ outb(cached_21, 0x21); /* Restore master IRQ mask. */
+
+ if ( mask )
+ {
+ dprintk(XENLOG_INFO, "PIC aliasing mask: %02x\n", mask);
+ i8259A_alias_mask = mask;
+ }
+}
+
static struct irqaction __read_mostly cascade = { no_action, "cascade", NULL};
void __init init_IRQ(void)
init_8259A(0);
+ probe_8259A_alias();
+
for (irq = 0; platform_legacy_irq(irq); irq++) {
struct irq_desc *desc = irq_to_desc(irq);