]> xenbits.xensource.com Git - libvirt.git/commitdiff
conf: showing cache/memoryBW monitor features in capabilities
authorHuaqiang <huaqiang.wang@intel.com>
Wed, 13 Nov 2019 17:08:20 +0000 (01:08 +0800)
committerDaniel P. Berrangé <berrange@redhat.com>
Fri, 13 Dec 2019 15:27:07 +0000 (15:27 +0000)
We learned that the hardware features of CAT, CMT, MBA and MBM
are orthogonal ones, if CAT or MBA is not supported in system,
but CMT or MBM are supported, then the cache monitor or
memoryBW monitor features may not be correctly displayed in
host capabilities through command 'virsh capabilites'.

Showing the cache/memoryBW monitor capabilities even there is
no support of cache allocation or memoryBW allocation features.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Huaqiang <huaqiang.wang@intel.com>
src/conf/capabilities.c

index 7021283310db6caf0018af2eb9be60010738a4d0..4fac59e6f7b70d9080ea1033831f837609f93612 100644 (file)
@@ -970,7 +970,7 @@ virCapabilitiesFormatCaches(virBufferPtr buf,
     size_t i = 0;
     size_t j = 0;
 
-    if (!cache->nbanks)
+    if (!cache->nbanks && !cache->monitor)
         return 0;
 
     virBufferAddLit(buf, "<cache>\n");
@@ -1055,7 +1055,7 @@ virCapabilitiesFormatMemoryBandwidth(virBufferPtr buf,
 {
     size_t i = 0;
 
-    if (!memBW->nnodes)
+    if (!memBW->nnodes && !memBW->monitor)
         return 0;
 
     virBufferAddLit(buf, "<memory_bandwidth>\n");