REG32(CONTROL_SET, 0)
REG32(CONTROL_CLR, 4)
+#define SCL BIT(0)
+#define SDA BIT(1)
+
static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
unsigned size)
{
qemu_log_mask(LOG_GUEST_ERROR,
"%s: Bad offset 0x%x\n", __func__, (int)offset);
}
- bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
- s->in = bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
+ bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SCL, (s->out & SCL) != 0);
+ s->in = bitbang_i2c_set(&s->bitbang, BITBANG_I2C_SDA, (s->out & SDA) != 0);
}
static const MemoryRegionOps versatile_i2c_ops = {