]> xenbits.xensource.com Git - xen.git/commitdiff
xen/riscv: initialize .bss section
authorOleksii Kurochko <oleksii.kurochko@gmail.com>
Mon, 20 Mar 2023 16:12:04 +0000 (17:12 +0100)
committerJan Beulich <jbeulich@suse.com>
Mon, 20 Mar 2023 16:12:04 +0000 (17:12 +0100)
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Bobby Eshleman <bobbyeshleman@gmail.com>
xen/arch/riscv/riscv64/head.S
xen/arch/riscv/setup.c

index adf5d6c74ad9ae81568528b878957f3b661ca02a..8887f0cbd4452129717f0f219890562da0b1d740 100644 (file)
@@ -1,3 +1,4 @@
+#include <asm/asm.h>
 #include <asm/riscv_encoding.h>
 
         .section .text.header, "ax", %progbits
@@ -18,6 +19,14 @@ ENTRY(start)
         li      t0, SSTATUS_FS
         csrc    CSR_SSTATUS, t0
 
+        /* Clear the BSS */
+        la      t3, __bss_start
+        la      t4, __bss_end
+.L_clear_bss:
+        REG_S   zero, (t3)
+        add     t3, t3, __SIZEOF_POINTER__
+        bltu    t3, t4, .L_clear_bss
+
         la      sp, cpu0_boot_stack
         li      t0, STACK_SIZE
         add     sp, sp, t0
index 22ef2817ff56b7c90b25fa15775b5fe855d7d4a1..3786f337e03e5479becf61e35115cb29dcacd17c 100644 (file)
@@ -7,6 +7,14 @@
 unsigned char __initdata cpu0_boot_stack[STACK_SIZE]
     __aligned(STACK_SIZE);
 
+/*  
+ * To be sure that .bss isn't zero. It will simplify code of
+ * .bss initialization.
+ * TODO:
+ *   To be deleted when the first real .bss user appears
+ */
+int dummy_bss __attribute__((unused));
+
 void __init noreturn start_xen(unsigned long bootcpu_id,
                                paddr_t dtb_addr)
 {