]> xenbits.xensource.com Git - people/iwj/xen.git/commitdiff
xen/x86: add a function for modifying cr3
authorJuergen Gross <jgross@suse.com>
Thu, 26 Apr 2018 11:33:11 +0000 (13:33 +0200)
committerWei Liu <wei.liu2@citrix.com>
Fri, 4 May 2018 14:52:03 +0000 (15:52 +0100)
Instead of having multiple places with more or less identical asm
statements just have one function doing a write to cr3.

As this function should be named write_cr3() rename the current
write_cr3() function to switch_cr3().

Suggested-by: Andrew Copper <andrew.cooper3@citrix.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/flushtlb.c
xen/arch/x86/mm.c
xen/arch/x86/pv/domain.c
xen/common/efi/runtime.c
xen/include/asm-x86/flushtlb.h
xen/include/asm-x86/processor.h

index 2729ba42e7d44fad769b366a8b3831766632bf73..1af9221607bf7587802fc65d9a21412d7ff4b5ac 100644 (file)
@@ -72,7 +72,7 @@ static void post_flush(u32 t)
     this_cpu(tlbflush_time) = t;
 }
 
-void write_cr3(unsigned long cr3)
+void switch_cr3(unsigned long cr3)
 {
     unsigned long flags, cr4;
     u32 t;
@@ -84,7 +84,7 @@ void write_cr3(unsigned long cr3)
     cr4 = read_cr4();
 
     write_cr4(cr4 & ~X86_CR4_PGE);
-    asm volatile ( "mov %0, %%cr3" : : "r" (cr3) : "memory" );
+    write_cr3(cr3);
     write_cr4(cr4);
 
     post_flush(t);
index 5373879359a6800c4f1debfbaa4169c803dfeea5..7e2cc924fd591bf2a6457d544321cda0bd31ab53 100644 (file)
@@ -503,7 +503,7 @@ void make_cr3(struct vcpu *v, mfn_t mfn)
 void write_ptbase(struct vcpu *v)
 {
     get_cpu_info()->root_pgt_changed = true;
-    write_cr3(v->arch.cr3);
+    switch_cr3(v->arch.cr3);
 }
 
 /*
index b1c40373faa62f4bb8e8044f222e7e60a31c3c6d..be40843b051e07501c79abbaad12a837f0902066 100644 (file)
@@ -220,7 +220,7 @@ static void _toggle_guest_pt(struct vcpu *v)
     get_cpu_info()->root_pgt_changed = true;
 
     /* Don't flush user global mappings from the TLB. Don't tick TLB clock. */
-    asm volatile ( "mov %0, %%cr3" : : "r" (v->arch.cr3) : "memory" );
+    write_cr3(v->arch.cr3);
 
     if ( !(v->arch.flags & TF_kernel_mode) )
         return;
index 3dbc2e8ee528841ec87954e4f4bd3cf2cb368e6e..4e5ddfef4f6363e7200acaa42d2ffbba24bf5dd4 100644 (file)
@@ -111,7 +111,7 @@ struct efi_rs_state efi_rs_enter(void)
         lgdt(&gdt_desc);
     }
 
-    write_cr3(virt_to_maddr(efi_l4_pgtable));
+    switch_cr3(virt_to_maddr(efi_l4_pgtable));
 
     return state;
 }
@@ -120,7 +120,7 @@ void efi_rs_leave(struct efi_rs_state *state)
 {
     if ( !state->cr3 )
         return;
-    write_cr3(state->cr3);
+    switch_cr3(state->cr3);
     if ( is_pv_vcpu(current) && !is_idle_vcpu(current) )
     {
         struct desc_ptr gdt_desc = {
index 9b2336c07afc8d9afd71767e8afaac6a854df954..d27906c0ae4898f318b8b1d57c72f3e0341784b9 100644 (file)
@@ -84,7 +84,7 @@ static inline unsigned long read_cr3(void)
 }
 
 /* Write pagetable base and implicitly tick the tlbflush clock. */
-void write_cr3(unsigned long cr3);
+void switch_cr3(unsigned long cr3);
 
 /* flush_* flag fields: */
  /*
index 1bc2f90d04776ae50218bd2517ed152e0a07694d..2798db635ad20ae6ab3df0aa31d4efcc612cd9a7 100644 (file)
@@ -283,6 +283,11 @@ static inline unsigned long read_cr2(void)
     return cr2;
 }
 
+static inline void write_cr3(unsigned long val)
+{
+    asm volatile ( "mov %0, %%cr3" : : "r" (val) : "memory" );
+}
+
 static inline unsigned long read_cr4(void)
 {
     return get_cpu_info()->cr4;