interrupts = <0 71 0>;
};
+
+ usb@12000000 {
+ compatible = "samsung,exynos-dwc3";
+ reg = <0x12000000 0x10000>;
+ interrupts = <0 72 0>;
+ };
+
rtc {
compatible = "samsung,s3c6410-rtc";
reg = <0x101E0000 0x100>;
select SOC_EXYNOS5250
select USE_OF
select EXYNOS4_SETUP_USB_PHY
+ select USB_ARCH_HAS_XHCI
help
Machine support for Samsung EXYNOS5 machine with device tree enabled.
Select this if a fdt blob is available for the EXYNOS5 SoC based board.
.name = "usbhost",
.enable = exynos5_clk_ip_fsys_ctrl ,
.ctrlbit = (1 << 18),
+ }, {
+ .name = "usbdrd30",
+ .parent = &exynos5_clk_aclk_200.clk,
+ .enable = exynos5_clk_ip_fsys_ctrl,
+ .ctrlbit = (1 << 19),
}, {
.name = "usbotg",
.enable = exynos5_clk_ip_fsys_ctrl,
.nr_sources = ARRAY_SIZE(exynos5_clkset_group_list),
};
+struct clk *exynos5_clkset_usbdrd30_list[] = {
+ [0] = &exynos5_clk_mout_mpll.clk,
+ [1] = &exynos5_clk_mout_cpll.clk,
+};
+
+struct clksrc_sources exynos5_clkset_usbdrd30 = {
+ .sources = exynos5_clkset_usbdrd30_list,
+ .nr_sources = ARRAY_SIZE(exynos5_clkset_usbdrd30_list),
+};
+
/* Possible clock sources for aclk_266_gscl_sub Mux */
static struct clk *clk_src_gscl_266_list[] = {
[0] = &clk_ext_xtal_mux,
.parent = &exynos5_clk_mout_cpll.clk,
},
.reg_div = { .reg = EXYNOS5_CLKDIV_GEN, .shift = 4, .size = 3 },
- },
+ }, {
+
+ .clk = {
+ .name = "sclk_usbdrd30",
+ .enable = exynos5_clksrc_mask_fsys_ctrl,
+ .ctrlbit = (1 << 28),
+ },
+ .sources = &exynos5_clkset_usbdrd30,
+ .reg_src = {.reg = EXYNOS5_CLKSRC_FSYS, .shift = 28, .size = 1},
+ .reg_div = {.reg = EXYNOS5_CLKDIV_FSYS0, .shift = 24, .size = 4},
+ }
};
/* Clock initialization code */
#define EXYNOS4_PA_EHCI 0x12580000
#define EXYNOS4_PA_OHCI 0x12590000
#define EXYNOS4_PA_HSPHY 0x125B0000
+#define EXYNOS5_PA_DRD 0x12000000
+#define EXYNOS5_PA_EHCI 0x12110000
+#define EXYNOS5_PA_OHCI 0x12120000
#define EXYNOS4_PA_MFC 0x13400000
#define EXYNOS4_PA_UART 0x13800000
#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
#define S3C_PA_USB_HSOTG EXYNOS4_PA_HSOTG
-
+#define S3C_PA_USB_PHY EXYNOS4_PA_HSPHY
#define S5P_PA_EHCI EXYNOS4_PA_EHCI
#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
#define S5P_PA_FIMC1 EXYNOS4_PA_FIMC1
/* For EXYNOS5 */
-#define EXYNOS5_USB_CFG S5P_PMUREG(0x0230)
#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
"exynos-ohci", &smdk5250_ohci_pdata),
OF_DEV_AUXDATA("samsung,exynos-ehci", 0x12110000,
"s5p-ehci", &smdk5250_ehci_pdata),
+ OF_DEV_AUXDATA("samsung,exynos-dwc3", EXYNOS5_PA_DRD,
+ "exynos-dwc3", NULL),
{},
};
extern struct platform_device samsung_asoc_dma;
extern struct platform_device samsung_asoc_idma;
extern struct platform_device samsung_device_keypad;
-
/* s3c2440 specific devices */
#ifdef CONFIG_CPU_S3C2440
# some non-PCI HCDs implement xHCI
config USB_ARCH_HAS_XHCI
boolean
+ default y if ARCH_EXYNOS5
default PCI
menuconfig USB_SUPPORT
desc = intf->cur_altsetting;
hdev = interface_to_usbdev(intf);
-
/* Hubs have proper suspend/resume support. */
usb_enable_autosuspend(hdev);
#include <linux/clk.h>
#include <linux/usb/otg.h>
#include <linux/usb/nop-usb-xceiv.h>
-
+#include <linux/of.h>
#include "core.h"
struct dwc3_exynos {
return ret;
}
+static u64 dwc3_exynos_dma_mask = DMA_BIT_MASK(32);
+
static int __devinit dwc3_exynos_probe(struct platform_device *pdev)
{
- struct dwc3_exynos_data *pdata = pdev->dev.platform_data;
struct platform_device *dwc3;
struct dwc3_exynos *exynos;
struct clk *clk;
dev_err(&pdev->dev, "not enough memory\n");
goto err0;
}
+ /*
+ * Right now device-tree probed devices don't get dma_mask set.
+ * Since shared usb code relies on it, set it here for now.
+ * Once we move to full device tree support this will vanish off.
+ */
+ if (!pdev->dev.dma_mask)
+ pdev->dev.dma_mask = &dwc3_exynos_dma_mask;
platform_set_drvdata(pdev, exynos);
clk_enable(exynos->clk);
- /* PHY initialization */
- if (!pdata) {
- dev_dbg(&pdev->dev, "missing platform data\n");
- } else {
- if (pdata->phy_init)
- pdata->phy_init(pdev, pdata->phy_type);
- }
-
ret = platform_device_add_resources(dwc3, pdev->resource,
pdev->num_resources);
if (ret) {
return 0;
err4:
- if (pdata && pdata->phy_exit)
- pdata->phy_exit(pdev, pdata->phy_type);
-
clk_disable(clk);
clk_put(clk);
err3:
static int __devexit dwc3_exynos_remove(struct platform_device *pdev)
{
struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
- struct dwc3_exynos_data *pdata = pdev->dev.platform_data;
platform_device_unregister(exynos->dwc3);
platform_device_unregister(exynos->usb2_phy);
dwc3_put_device_id(exynos->dwc3->id);
- if (pdata && pdata->phy_exit)
- pdata->phy_exit(pdev, pdata->phy_type);
-
clk_disable(exynos->clk);
clk_put(exynos->clk);
return 0;
}
+#ifdef CONFIG_OF
+static const struct of_device_id exynos_dwc3_match[] = {
+ { .compatible = "samsung,exynos-dwc3" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
+#endif
+
static struct platform_driver dwc3_exynos_driver = {
.probe = dwc3_exynos_probe,
.remove = __devexit_p(dwc3_exynos_remove),
.driver = {
.name = "exynos-dwc3",
+ .of_match_table = of_match_ptr(exynos_dwc3_match),
},
};
if (usb_disabled())
return -ENODEV;
-
driver = &xhci_plat_xhci_driver;
irq = platform_get_irq(pdev, 0);