x86emul: parallelize SIMD test code building

In anticipation of further flavors (AVX, AVX-512) going to be added
(which would make the current situation even worse), facilitate
reduction of build time (and hence latency to availability of test
results) via use of make's -j option.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>

diff --git a/.gitignore b/.gitignore
index 35768fb7a39a0c38d18bc8f72ce57b3dd7894b05..2bf815b75358b0de039e986955e143aa09763baa 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -221,10 +221,12 @@ tools/python/build/*
 tools/security/secpol_tool
 tools/security/xen/*
 tools/security/xensec_tool
+tools/tests/x86_emulator/*.bin
+tools/tests/x86_emulator/*.tmp
 tools/tests/x86_emulator/asm
-tools/tests/x86_emulator/blowfish.bin
+tools/tests/x86_emulator/avx*.h
 tools/tests/x86_emulator/blowfish.h
-tools/tests/x86_emulator/simd.h
+tools/tests/x86_emulator/sse*.h
 tools/tests/x86_emulator/test_x86_emulator
 tools/tests/x86_emulator/x86_emulate
 tools/tests/xen-access/xen-access

diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile
index 7387af28ae56adef1e5ddecb22ba7b31ee72283d..fd13ab53b1c76f107e3b02774f7b58d22aee3587 100644 (file)
--- a/tools/tests/x86_emulator/Makefile
+++ b/tools/tests/x86_emulator/Makefile
@@ -11,7 +11,8 @@ all: $(TARGET)
 run: $(TARGET)
        ./$(TARGET)
 
-TESTCASES := blowfish simd
+SIMD := sse sse2 sse4
+TESTCASES := blowfish $(SIMD) $(addsuffix -avx,$(filter sse%,$(SIMD)))
 
 blowfish-cflags := ""
 blowfish-cflags-x86_32 := "-mno-accumulate-outgoing-args -Dstatic="
@@ -34,19 +35,28 @@ sse2avx-sse  := -ffixed-xmm0 -Wa,-msse2avx
 sse2avx-sse2 := $(sse2avx-sse)
 sse2avx-sse4 := -Wa,-msse2avx
 
-simd-cflags := $(foreach flavor,sse sse2 sse4, \
-                 $(foreach vec,$($(flavor)-vecs), \
-                   $(foreach int,$($(flavor)-ints), \
-                     "-D$(flavor)_$(vec)i$(int) -m$(flavor) -O2 -DVEC_SIZE=$(vec) -DINT_SIZE=$(int)" \
-                     "-D$(flavor)_$(vec)u$(int) -m$(flavor) -O2 -DVEC_SIZE=$(vec) -DUINT_SIZE=$(int)" \
-                     "-D$(flavor)_avx_$(vec)i$(int) -m$(flavor) $(sse2avx-$(flavor)) -O2 -DVEC_SIZE=$(vec) -DINT_SIZE=$(int)" \
-                     "-D$(flavor)_avx_$(vec)u$(int) -m$(flavor) $(sse2avx-$(flavor)) -O2 -DVEC_SIZE=$(vec) -DUINT_SIZE=$(int)") \
-                   $(foreach flt,$($(flavor)-flts), \
-                     "-D$(flavor)_$(vec)f$(flt) -m$(flavor) -O2 -DVEC_SIZE=$(vec) -DFLOAT_SIZE=$(flt)" \
-                     "-D$(flavor)_avx_$(vec)f$(flt) -m$(flavor) $(sse2avx-$(flavor)) -O2 -DVEC_SIZE=$(vec) -DFLOAT_SIZE=$(flt)")) \
-                 $(foreach flt,$($(flavor)-flts), \
-                   "-D$(flavor)_f$(flt) -m$(flavor) -mfpmath=sse -O2 -DFLOAT_SIZE=$(flt)" \
-                   "-D$(flavor)_avx_f$(flt) -m$(flavor) -mfpmath=sse $(sse2avx-$(flavor)) -O2 -DFLOAT_SIZE=$(flt)"))
+define simd-defs
+$(1)-cflags := \
+       $(foreach vec,$($(1)-vecs), \
+         $(foreach int,$($(1)-ints), \
+           "-D_$(vec)i$(int) -m$(1) -O2 -DVEC_SIZE=$(vec) -DINT_SIZE=$(int)" \
+           "-D_$(vec)u$(int) -m$(1) -O2 -DVEC_SIZE=$(vec) -DUINT_SIZE=$(int)") \
+         $(foreach flt,$($(1)-flts), \
+           "-D_$(vec)f$(flt) -m$(1) -O2 -DVEC_SIZE=$(vec) -DFLOAT_SIZE=$(flt)")) \
+       $(foreach flt,$($(1)-flts), \
+         "-D_f$(flt) -m$(1) -mfpmath=sse -O2 -DFLOAT_SIZE=$(flt)")
+$(1)-avx-cflags := \
+       $(foreach vec,$($(1)-vecs), \
+         $(foreach int,$($(1)-ints), \
+           "-D_$(vec)i$(int) -m$(1) $(sse2avx-$(1)) -O2 -DVEC_SIZE=$(vec) -DINT_SIZE=$(int)" \
+           "-D_$(vec)u$(int) -m$(1) $(sse2avx-$(1)) -O2 -DVEC_SIZE=$(vec) -DUINT_SIZE=$(int)") \
+         $(foreach flt,$($(1)-flts), \
+           "-D_$(vec)f$(flt) -m$(1) $(sse2avx-$(1)) -O2 -DVEC_SIZE=$(vec) -DFLOAT_SIZE=$(flt)")) \
+       $(foreach flt,$($(1)-flts), \
+         "-D_f$(flt) -m$(1) -mfpmath=sse $(sse2avx-$(1)) -O2 -DFLOAT_SIZE=$(flt)")
+endef
+
+$(foreach flavor,$(SIMD),$(eval $(call simd-defs,$(flavor))))
 
 $(addsuffix .h,$(TESTCASES)): %.h: %.c testcase.mk Makefile
        rm -f $@.new $*.bin
@@ -54,7 +64,7 @@ $(addsuffix .h,$(TESTCASES)): %.h: %.c testcase.mk Makefile
            for cflags in $($*-cflags) $($*-cflags-$(arch)); do \
                $(MAKE) -f testcase.mk TESTCASE=$* XEN_TARGET_ARCH=$(arch) $*-cflags="$$cflags" all; \
                flavor=$$(echo $${cflags} | sed -e 's, .*,,' -e 'y,-=,__,') ; \
-               (echo "static const unsigned int $*_$(arch)$${flavor}[] = {"; \
+               (echo "static const unsigned int $(subst -,_,$*)_$(arch)$${flavor}[] = {"; \
                 od -v -t x $*.bin | sed -e 's/^[0-9]* /0x/' -e 's/ /, 0x/g' -e 's/$$/,/'; \
                 echo "};") >>$@.new; \
                rm -f $*.bin; \
@@ -62,6 +72,9 @@ $(addsuffix .h,$(TESTCASES)): %.h: %.c testcase.mk Makefile
        )
        mv $@.new $@
 
+$(addsuffix .c,$(SIMD)) $(addsuffix -avx.c,$(filter sse%,$(SIMD))):
+       ln -sf simd.c $@
+
 $(TARGET): x86_emulate.o test_x86_emulator.o
        $(HOSTCC) -o $@ $^
 

diff --git a/tools/tests/x86_emulator/test_x86_emulator.c b/tools/tests/x86_emulator/test_x86_emulator.c
index 04332bb83a468c2e65e7c81724fd0be9c54f92cb..bfe7ea4720212d3aeafaabd0e6a481c22c105f4e 100644 (file)
--- a/tools/tests/x86_emulator/test_x86_emulator.c
+++ b/tools/tests/x86_emulator/test_x86_emulator.c
@@ -5,7 +5,12 @@
 
 #include "x86_emulate.h"
 #include "blowfish.h"
-#include "simd.h"
+#include "sse.h"
+#include "sse2.h"
+#include "sse4.h"
+#include "sse-avx.h"
+#include "sse2-avx.h"
+#include "sse4-avx.h"
 
 #define verbose false /* Switch to true for far more logging. */
 
@@ -79,8 +84,8 @@ static const struct {
     BLOWFISH(32, blowfish (push), _mno_accumulate_outgoing_args),
 #undef BLOWFISH
 #define SIMD_(bits, desc, feat, form)                               \
-    { .code = simd_x86_ ## bits ## _D ## feat ## _ ## form,         \
-      .size = sizeof(simd_x86_ ## bits ## _D ## feat ## _ ## form), \
+    { .code = feat ## _x86_ ## bits ## _D ## _ ## form,             \
+      .size = sizeof(feat ## _x86_ ## bits ## _D ## _ ## form),     \
       .bitness = bits, .name = #desc,                               \
       .check_cpu = simd_check_ ## feat,                             \
       .set_regs = simd_set_regs,                                    \