hvm: Clean up vlapic_reg_write() error propagation.

In particular, correctly propagate errors through vlapic_apicv_write()
and hvm_x2apic_msr_write().

Signed-off-by: Keir Fraser <keir@xen.org>
master commit: 5082cc19524b6687ef1bc0a717538d75aae7cd00
master date: 2013-03-28 20:16:37 +0000

diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c
index 3af41cc7c57301cc57df2af5bd2cd10c5f12a1ae..09baf8dc7447318b43f464a6964dc11a41b10257 100644 (file)
--- a/xen/arch/x86/hvm/vlapic.c
+++ b/xen/arch/x86/hvm/vlapic.c
@@ -660,10 +660,9 @@ static int vlapic_reg_write(struct vcpu *v,
         break;
 
     case APIC_SELF_IPI:
-        if ( vlapic_x2apic_mode(vlapic) )
-            vlapic_reg_write(v, APIC_ICR, 0x40000 | (val & 0xff));
-        else
-            rc = X86EMUL_UNHANDLEABLE;
+        rc = vlapic_x2apic_mode(vlapic)
+            ? vlapic_reg_write(v, APIC_ICR, 0x40000 | (val & 0xff))
+            : X86EMUL_UNHANDLEABLE;
         break;
 
     case APIC_ICR:
@@ -818,19 +817,18 @@ int hvm_x2apic_msr_write(struct vcpu *v, unsigned int msr, uint64_t msr_content)
 {
     struct vlapic *vlapic = vcpu_vlapic(v);
     uint32_t offset = (msr - MSR_IA32_APICBASE_MSR) << 4;
-    int rc;
 
     if ( !vlapic_x2apic_mode(vlapic) )
-        return 1;
+        return X86EMUL_UNHANDLEABLE;
 
     if ( offset == APIC_ICR )
-        if ( vlapic_reg_write(v, APIC_ICR2 , (uint32_t)(msr_content >> 32)) )
-            return 1;
-
-    rc = vlapic_reg_write(v, offset, (uint32_t)msr_content);
+    {
+        int rc = vlapic_reg_write(v, APIC_ICR2, (uint32_t)(msr_content >> 32));
+        if ( rc )
+            return rc;
+    }
 
-    /* X86EMUL_RETRY for SIPI */
-    return ((rc != X86EMUL_OKAY) && (rc != X86EMUL_RETRY));
+    return vlapic_reg_write(v, offset, (uint32_t)msr_content);
 }
 
 static int vlapic_range(struct vcpu *v, unsigned long addr)