arm64: remove exception instruction length assertion

From the (now removed) comment:

 * It is unclear in some cases if the bit is implementation defined.
 * The Foundation Model and QEMU disagree on if the IL bit should
 * be set when we are in a data fault from the same EL and the ISV
 * bit (bit 24) is also set.

Instead of adding even more special cases just remove the assertion.

Approved by:	andrew
Sponsored by:	The FreeBSD Foundation

diff --git a/sys/arm64/arm64/trap.c b/sys/arm64/arm64/trap.c
index a29f91587e90680506f8431441e61c44d31ce438..b7db9742951acb0c376f083dbb949c919729a05d 100644 (file)
--- a/sys/arm64/arm64/trap.c
+++ b/sys/arm64/arm64/trap.c
@@ -263,20 +263,6 @@ do_el1h_sync(struct trapframe *frame)
                return;
 #endif
 
-       /*
-        * Sanity check we are in an exception er can handle. The IL bit
-        * is used to indicate the instruction length, except in a few
-        * exceptions described in the ARMv8 ARM.
-        *
-        * It is unclear in some cases if the bit is implementation defined.
-        * The Foundation Model and QEMU disagree on if the IL bit should
-        * be set when we are in a data fault from the same EL and the ISV
-        * bit (bit 24) is also set.
-        */
-       KASSERT((esr & ESR_ELx_IL) == ESR_ELx_IL ||
-           (exception == EXCP_DATA_ABORT && ((esr & ISS_DATA_ISV) == 0)),
-           ("Invalid instruction length in exception, esr %lx", esr));
-
        CTR4(KTR_TRAP,
            "do_el1_sync: curthread: %p, esr %lx, elr: %lx, frame: %p",
            curthread, esr, frame->tf_elr, frame);