Revert "xen/riscv: drop CONFIG_RISCV_ISA_RV64G"

This reverts commit 86b1b8ec3d9d0508a95540e368432291b883837f. It
fails in CI without an adjustment there.

diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig
index d882e0a0598d4b038260dd07b804b9eca744372e..fa95cd0a42134125788c86f775a7e2ac36a1cb8b 100644 (file)
--- a/xen/arch/riscv/Kconfig
+++ b/xen/arch/riscv/Kconfig
@@ -23,6 +23,24 @@ endmenu
 
 menu "ISA Selection"
 
+choice
+       prompt "Base ISA"
+       default RISCV_ISA_RV64G if RISCV_64
+       help
+         This selects the base ISA extensions that Xen will target.
+
+config RISCV_ISA_RV64G
+       bool "RV64G"
+       help
+         Use the RV64I base ISA, plus
+         "M" for multiply/divide,
+         "A" for atomic instructions,
+         “F”/"D" for  {single/double}-precision floating-point instructions,
+         "Zicsr" for control and status register access,
+         "Zifencei" for instruction-fetch fence.
+
+endchoice
+
 config RISCV_ISA_C
        bool "Compressed extension"
        default y

diff --git a/xen/arch/riscv/arch.mk b/xen/arch/riscv/arch.mk
index 3034da76cb40a09c3ee7bd05d9c2961ccad7acca..17827c302cd18d14bcdee38cffc0c83d63b1ce8d 100644 (file)
--- a/xen/arch/riscv/arch.mk
+++ b/xen/arch/riscv/arch.mk
@@ -6,12 +6,10 @@ $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
 riscv-abi-$(CONFIG_RISCV_32) := -mabi=ilp32
 riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
 
-riscv-march-$(CONFIG_RISCV_64) := rv64
-riscv-march-y += ima
-riscv-march-$(CONFIG_RISCV_ISA_C) += c
-riscv-march-y += _zicsr_zifencei
+riscv-march-$(CONFIG_RISCV_ISA_RV64G) := rv64g
+riscv-march-$(CONFIG_RISCV_ISA_C)       := $(riscv-march-y)c
 
-riscv-generic-flags := $(riscv-abi-y) -march=$(subst $(space),,$(riscv-march-y))
+riscv-generic-flags := $(riscv-abi-y) -march=$(riscv-march-y)
 
 # check-extension: Check whether extenstion is supported by a compiler and
 #                  an assembler.