int last_hw_cursor_y_end;
int real_vram_size; /* XXX: suppress that */
CPUWriteMemoryFunc **cirrus_linear_write;
- uint32_t map_addr;
- uint32_t map_end;
} CirrusVGAState;
typedef struct PCICirrusVGAState {
};
-static void set_vram_mapping(CirrusVGAState *s, unsigned long begin, unsigned long end)
-{
- unsigned long i;
- struct xen_add_to_physmap xatp;
- int rc;
-
- if (end > begin + VGA_RAM_SIZE)
- end = begin + VGA_RAM_SIZE;
-
- fprintf(logfile,"mapping vram to %lx - %lx\n", begin, end);
-
- xatp.domid = domid;
- xatp.space = XENMAPSPACE_gmfn;
-
- for (i = 0; i < (end - begin) >> TARGET_PAGE_BITS; i++) {
- xatp.idx = (s->vram_gmfn >> TARGET_PAGE_BITS) + i;
- xatp.gpfn = (begin >> TARGET_PAGE_BITS) + i;
- rc = xc_memory_op(xc_handle, XENMEM_add_to_physmap, &xatp);
- if (rc) {
- fprintf(stderr, "add_to_physmap MFN %"PRI_xen_pfn" to PFN %"PRI_xen_pfn" failed: %d\n", xatp.idx, xatp.gpfn, rc);
- return;
- }
- }
-
- (void)xc_domain_pin_memory_cacheattr(
- xc_handle, domid,
- begin >> TARGET_PAGE_BITS,
- end >> TARGET_PAGE_BITS,
- XEN_DOMCTL_MEM_CACHEATTR_WB);
-
- s->vram_gmfn = begin;
-}
-
-static void unset_vram_mapping(CirrusVGAState *s, unsigned long begin, unsigned long end)
-{
- if (s->vram_gmfn) {
- /* We can put it there for xend to save it efficiently */
- set_vram_mapping(s, 0xff000000, 0xff000000 + VGA_RAM_SIZE);
- }
-}
-
void cirrus_restart_acc(CirrusVGAState *s)
{
set_vram_mapping(s, s->lfb_addr, s->lfb_end);
- s->map_addr = s->lfb_addr;
- s->map_end = s->lfb_end;
}
/* Compute the memory access functions */
mode = s->gr[0x05] & 0x7;
if (mode < 4 || mode > 5 || ((s->gr[0x0B] & 0x4) == 0)) {
- if (s->lfb_addr && s->lfb_end && !s->map_addr) {
+ if (s->lfb_addr && s->lfb_end && s->vram_gmfn != s->lfb_addr) {
set_vram_mapping(s, s->lfb_addr, s->lfb_end);
- s->map_addr = s->lfb_addr;
- s->map_end = s->lfb_end;
}
s->cirrus_linear_write[0] = cirrus_linear_mem_writeb;
s->cirrus_linear_write[1] = cirrus_linear_mem_writew;
s->cirrus_linear_write[2] = cirrus_linear_mem_writel;
} else {
generic_io:
- if (s->lfb_addr && s->lfb_end && s->map_addr) {
- unset_vram_mapping(s, s->map_addr, s->map_end);
- s->map_addr = s->map_end = 0;
+ if (s->lfb_addr && s->lfb_end && s->vram_gmfn != s->lfb_addr) {
+ unset_vram_mapping(s);
}
s->cirrus_linear_write[0] = cirrus_linear_writeb;
s->cirrus_linear_write[1] = cirrus_linear_writew;
/* XXX: we do not save the bitblt state - we assume we do not save
the state when the blitter is active */
- vga_acc = (!!s->map_addr);
+ vga_acc = (s->lfb_addr == s->vram_gmfn);
qemu_put_8s(f, &vga_acc);
/* XXX old versions saved rubbish here, keeping for compatibility */
qemu_put_be32(f, 0xffffffff);
qemu_put_be64s(f, &s->vram_gmfn);
if (!s->vram_gmfn && !vga_acc)
/* Old guest: VRAM is not mapped, we have to save it ourselves */
- qemu_put_buffer(f, s->vram_ptr, VGA_RAM_SIZE);
+ qemu_put_buffer(f, s->vram_ptr, s->vram_size);
}
static int cirrus_vga_load(QEMUFile *f, void *opaque, int version_id)
/* Old guest, VRAM is not mapped, we have to restore it
* ourselves */
s->vram_gmfn = vga_acc ? s->lfb_addr : 0xff000000;
- xen_vga_populate_vram(s->vram_gmfn);
+ xen_vga_populate_vram(s->vram_gmfn, s->vram_size);
}
- xen_vga_vram_map(s->vram_gmfn);
+ xen_vga_vram_map(s->vram_gmfn, s->vram_size);
if (version_id < 3 || (!vga_acc && !t))
- qemu_get_buffer(f, s->vram_ptr, VGA_RAM_SIZE);
- if (vga_acc) {
- s->map_addr = s->lfb_addr;
- s->map_end = s->lfb_end;
- }
+ qemu_get_buffer(f, s->vram_ptr, s->vram_size);
/* force refresh */
s->graphic_mode = -1;
s = qemu_mallocz(sizeof(CirrusVGAState));
+ if (vga_ram_size != 4*1024*1024) {
+ fprintf(stderr, "The -videoram option does not work with the cirrus vga model. Video ram set to 4M. \n");
+ vga_ram_size = 4*1024*1024;
+ }
+
vga_common_init((VGAState *)s,
ds, vga_ram_base, vga_ram_offset, vga_ram_size);
cirrus_init_common(s, CIRRUS_ID_CLGD5430, 0);
cpu_register_physical_memory(addr, s->vram_size,
s->cirrus_linear_io_addr);
s->lfb_addr = addr;
- s->lfb_end = addr + VGA_RAM_SIZE;
+ s->lfb_end = addr + s->vram_size;
- if (s->map_addr && (s->lfb_addr != s->map_addr) &&
- (s->lfb_end != s->map_end))
+ if (s->lfb_addr != s->vram_gmfn)
fprintf(logfile, "cirrus vga map change while on lfb mode\n");
cpu_register_physical_memory(addr + 0x1000000, 0x400000,
/* setup VGA */
s = &d->cirrus_vga;
+ if (vga_ram_size != 4*1024*1024) {
+ fprintf(stderr, "The -videoram option does not work with the cirrus vga model. Video ram set to 4M. \n");
+ vga_ram_size = 4*1024*1024;
+ }
vga_common_init((VGAState *)s,
ds, vga_ram_base, vga_ram_offset, vga_ram_size);
cirrus_init_common(s, device_id, 1);
.name = "mipssim",
.desc = "MIPS MIPSsim platform",
.init = mips_mipssim_init,
- .ram_require = BIOS_SIZE + VGA_RAM_SIZE /* unused */,
+ .ram_require = BIOS_SIZE /* unused */,
.nodisk_ok = 1,
.max_cpus = 1,
};
.name = "mips",
.desc = "mips r4k platform",
.init = mips_r4k_init,
- .ram_require = VGA_RAM_SIZE + BIOS_SIZE,
+ .ram_require = BIOS_SIZE,
.nodisk_ok = 1,
.max_cpus = 1,
};
.name = "pc",
.desc = "Standard PC",
.init = pc_init_pci,
- .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
+ .ram_require = PC_MAX_BIOS_SIZE,
.max_cpus = 255,
};
.name = "isapc",
.desc = "ISA-only PC",
.init = pc_init_isa,
- .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
+ .ram_require = PC_MAX_BIOS_SIZE,
.max_cpus = 1,
};
extern enum vga_retrace_method vga_retrace_method;
-#ifndef TARGET_SPARC
-#define VGA_RAM_SIZE (8192 * 1024)
-#else
-#define VGA_RAM_SIZE (9 * 1024 * 1024)
-#endif
-
int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
unsigned long vga_ram_offset, int vga_ram_size);
int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
.name = "mac99",
.desc = "Mac99 based PowerMAC",
.init = ppc_core99_init,
- .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
+ .ram_require = BIOS_SIZE,
.max_cpus = 1,
};
.name = "g3bw",
.desc = "Heathrow based PowerMAC",
.init = ppc_heathrow_init,
- .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
+ .ram_require = BIOS_SIZE,
.max_cpus = 1,
};
.name = "prep",
.desc = "PowerPC PREP platform",
.init = ppc_prep_init,
- .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
+ .ram_require = BIOS_SIZE,
.max_cpus = 1,
};
.name = "sun4u",
.desc = "Sun4u platform",
.init = sun4u_init,
- .ram_require = PROM_SIZE_MAX + VGA_RAM_SIZE,
+ .ram_require = PROM_SIZE_MAX,
.nodisk_ok = 1,
.max_cpus = 16,
};
.name = "sun4v",
.desc = "Sun4v platform",
.init = sun4v_init,
- .ram_require = PROM_SIZE_MAX + VGA_RAM_SIZE,
+ .ram_require = PROM_SIZE_MAX,
.nodisk_ok = 1,
.max_cpus = 16,
};
.name = "Niagara",
.desc = "Sun4v platform, Niagara",
.init = niagara_init,
- .ram_require = PROM_SIZE_MAX + VGA_RAM_SIZE,
+ .ram_require = PROM_SIZE_MAX,
.nodisk_ok = 1,
.max_cpus = 16,
};
//#define DEBUG_BOCHS_VBE
+// PCI 0x04: command(word), 0x06(word): status
+#define PCI_COMMAND_IOACCESS 0x0001
+#define PCI_COMMAND_MEMACCESS 0x0002
+#define PCI_COMMAND_BUSMASTER 0x0004
+
/* force some bits to zero */
const uint8_t sr_mask[8] = {
(uint8_t)~0xfc,
if ((val & VBE_DISPI_ENABLED) &&
!(s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED)) {
int h, shift_control;
+
+ if (s->vram_gmfn != s->lfb_addr) {
+ set_vram_mapping(s, s->lfb_addr, s->lfb_end);
+ }
s->vbe_regs[VBE_DISPI_INDEX_VIRT_WIDTH] =
s->vbe_regs[VBE_DISPI_INDEX_XRES];
vga_mem_writel,
};
+void set_vram_mapping(void *opaque, unsigned long begin, unsigned long end)
+{
+ unsigned long i;
+ struct xen_add_to_physmap xatp;
+ int rc;
+ VGAState *s = (VGAState *) opaque;
+
+ if (end > begin + s->vram_size)
+ end = begin + s->vram_size;
+
+ fprintf(logfile,"mapping vram to %lx - %lx\n", begin, end);
+
+ xatp.domid = domid;
+ xatp.space = XENMAPSPACE_gmfn;
+
+ for (i = 0; i < (end - begin) >> TARGET_PAGE_BITS; i++) {
+ xatp.idx = (s->vram_gmfn >> TARGET_PAGE_BITS) + i;
+ xatp.gpfn = (begin >> TARGET_PAGE_BITS) + i;
+ rc = xc_memory_op(xc_handle, XENMEM_add_to_physmap, &xatp);
+ if (rc) {
+ fprintf(stderr, "add_to_physmap MFN %"PRI_xen_pfn" to PFN %"PRI_xen_pfn" failed: %d\n", xatp.idx, xatp.gpfn, rc);
+ return;
+ }
+ }
+
+ (void)xc_domain_pin_memory_cacheattr(
+ xc_handle, domid,
+ begin >> TARGET_PAGE_BITS,
+ end >> TARGET_PAGE_BITS,
+ XEN_DOMCTL_MEM_CACHEATTR_WB);
+
+ s->vram_gmfn = begin;
+}
+
+void unset_vram_mapping(void *opaque)
+{
+ VGAState *s = (VGAState *) opaque;
+ if (s->vram_gmfn) {
+ /* We can put it there for xend to save it efficiently */
+ set_vram_mapping(s, 0xff000000, 0xff000000 + s->vram_size);
+ }
+}
+
static void vga_save(QEMUFile *f, void *opaque)
{
VGAState *s = opaque;
qemu_put_be64s(f, &s->vram_gmfn);
if (!s->vram_gmfn)
/* Old guest: VRAM is not mapped, we have to save it ourselves */
- qemu_put_buffer(f, s->vram_ptr, VGA_RAM_SIZE);
+ qemu_put_buffer(f, s->vram_ptr, vram_size);
}
static int vga_load(QEMUFile *f, void *opaque, int version_id)
if (version_id >= 4) {
qemu_get_be64s(f, &s->vram_gmfn);
if (s->vram_gmfn)
- xen_vga_vram_map(s->vram_gmfn);
+ xen_vga_vram_map(s->vram_gmfn, s->vram_size);
}
/* Old guest, VRAM is not mapped, we have to restore it ourselves */
if (!s->vram_gmfn) {
- xen_vga_populate_vram(0xff000000);
- xen_vga_vram_map(0xff000000);
+ xen_vga_populate_vram(0xff000000, s->vram_size);
+ xen_vga_vram_map(0xff000000, s->vram_size);
s->vram_gmfn = 0xff000000;
qemu_get_buffer(f, s->vram_ptr, s->vram_size);
}
cpu_register_physical_memory(addr, s->bios_size, s->bios_offset);
} else {
cpu_register_physical_memory(addr, s->vram_size, s->vram_offset);
+ s->lfb_addr = addr;
+ s->lfb_end = addr + size;
+#ifdef CONFIG_BOCHS_VBE
+ s->vbe_regs[VBE_DISPI_INDEX_LFB_ADDRESS_H] = s->lfb_addr >> 16;
+ s->vbe_regs[VBE_DISPI_INDEX_LFB_ADDRESS_L] = s->lfb_addr & 0xFFFF;
+ s->vbe_regs[VBE_DISPI_INDEX_VIDEO_MEMORY_64K] = s->vram_size >> 16;
+#endif
+
+ fprintf(stderr, "vga s->lfb_addr = %lx s->lfb_end = %lx \n", (unsigned long) s->lfb_addr,(unsigned long) s->lfb_end);
+
+ if (size != s->vram_size)
+ fprintf(stderr, "vga map with size %x != %x\n", size, s->vram_size);
}
}
static VGAState *xen_vga_state;
/* Allocate video memory in the GPFN space */
-void xen_vga_populate_vram(uint64_t vram_addr)
+void xen_vga_populate_vram(uint64_t vram_addr, uint32_t vga_ram_size)
{
unsigned long nr_pfn;
xen_pfn_t *pfn_list;
fprintf(logfile, "populating video RAM at %llx\n",
(unsigned long long)vram_addr);
- nr_pfn = VGA_RAM_SIZE >> TARGET_PAGE_BITS;
+ nr_pfn = vga_ram_size >> TARGET_PAGE_BITS;
pfn_list = malloc(sizeof(*pfn_list) * nr_pfn);
}
/* Mapping the video memory from GPFN space */
-void xen_vga_vram_map(uint64_t vram_addr)
+void xen_vga_vram_map(uint64_t vram_addr, uint32_t vga_ram_size)
{
unsigned long nr_pfn;
xen_pfn_t *pfn_list;
fprintf(logfile, "mapping video RAM from %llx\n",
(unsigned long long)vram_addr);
- nr_pfn = VGA_RAM_SIZE >> TARGET_PAGE_BITS;
+ nr_pfn = vga_ram_size >> TARGET_PAGE_BITS;
pfn_list = malloc(sizeof(*pfn_list) * nr_pfn);
s->get_resolution = vga_get_resolution;
if (!restore) {
- xen_vga_populate_vram(0xff000000);
- xen_vga_vram_map(0xff000000);
+ xen_vga_populate_vram(0xff000000, s->vram_size);
+ xen_vga_vram_map(0xff000000, s->vram_size);
s->vram_gmfn = 0xff000000;
}
s = qemu_mallocz(sizeof(VGAState));
if (!s)
return -1;
+
+ if (vga_ram_size > 16*1024*1024) {
+ fprintf (stderr, "The stdvga/VBE device model has no use for more than 16 Megs of vram. Video ram set to 16M. \n");
+ vga_ram_size = 16*1024*1024;
+ }
vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
vga_init(s);
return -1;
s = &d->vga_state;
+ if (vga_ram_size > 16*1024*1024) {
+ fprintf (stderr, "The stdvga/VBE device model has no use for more than 16 Megs of vram. Video ram set to 16M. \n");
+ vga_ram_size = 16*1024*1024;
+ }
+
vga_common_init(s, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
vga_init(s);
s->pci_dev = &d->dev;
pci_conf[0x01] = 0x12;
pci_conf[0x02] = 0x11;
pci_conf[0x03] = 0x11;
+ pci_conf[0x04] = PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS /* | PCI_COMMAND_BUSMASTER */;
pci_conf[0x0a] = 0x00; // VGA controller
pci_conf[0x0b] = 0x03;
pci_conf[0x0e] = 0x00; // header_type
+ pci_conf[0x2c] = 0x53; /* subsystem vendor: XenSource */
+ pci_conf[0x2d] = 0x58;
+ pci_conf[0x2e] = 0x01; /* subsystem device */
+ pci_conf[0x2f] = 0x00;
/* XXX: vga_ram_size must be a power of two */
pci_register_io_region(&d->dev, 0, vga_ram_size,
#define ST01_DISP_ENABLE 0x01
/* bochs VBE support */
-//#define CONFIG_BOCHS_VBE
-
-#define VBE_DISPI_MAX_XRES 1600
-#define VBE_DISPI_MAX_YRES 1200
-#define VBE_DISPI_MAX_BPP 32
-
-#define VBE_DISPI_INDEX_ID 0x0
-#define VBE_DISPI_INDEX_XRES 0x1
-#define VBE_DISPI_INDEX_YRES 0x2
-#define VBE_DISPI_INDEX_BPP 0x3
-#define VBE_DISPI_INDEX_ENABLE 0x4
-#define VBE_DISPI_INDEX_BANK 0x5
-#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
-#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
-#define VBE_DISPI_INDEX_X_OFFSET 0x8
-#define VBE_DISPI_INDEX_Y_OFFSET 0x9
-#define VBE_DISPI_INDEX_NB 0xa
-
-#define VBE_DISPI_ID0 0xB0C0
-#define VBE_DISPI_ID1 0xB0C1
-#define VBE_DISPI_ID2 0xB0C2
-#define VBE_DISPI_ID3 0xB0C3
-#define VBE_DISPI_ID4 0xB0C4
-
-#define VBE_DISPI_DISABLED 0x00
-#define VBE_DISPI_ENABLED 0x01
-#define VBE_DISPI_GETCAPS 0x02
-#define VBE_DISPI_8BIT_DAC 0x20
-#define VBE_DISPI_LFB_ENABLED 0x40
-#define VBE_DISPI_NOCLEARMEM 0x80
-
-#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
+#define CONFIG_BOCHS_VBE
+
+#define VBE_DISPI_MAX_XRES 2560
+#define VBE_DISPI_MAX_YRES 1600
+#define VBE_DISPI_MAX_BPP 32
+
+#define VBE_DISPI_INDEX_ID 0x0
+#define VBE_DISPI_INDEX_XRES 0x1
+#define VBE_DISPI_INDEX_YRES 0x2
+#define VBE_DISPI_INDEX_BPP 0x3
+#define VBE_DISPI_INDEX_ENABLE 0x4
+#define VBE_DISPI_INDEX_BANK 0x5
+#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
+#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
+#define VBE_DISPI_INDEX_X_OFFSET 0x8
+#define VBE_DISPI_INDEX_Y_OFFSET 0x9
+#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa
+#define VBE_DISPI_INDEX_LFB_ADDRESS_H 0xb
+#define VBE_DISPI_INDEX_LFB_ADDRESS_L 0xc
+#define VBE_DISPI_INDEX_NB 0xd
+
+#define VBE_DISPI_ID0 0xB0C0
+#define VBE_DISPI_ID1 0xB0C1
+#define VBE_DISPI_ID2 0xB0C2
+#define VBE_DISPI_ID3 0xB0C3
+#define VBE_DISPI_ID4 0xB0C4
+
+#define VBE_DISPI_DISABLED 0x00
+#define VBE_DISPI_ENABLED 0x01
+#define VBE_DISPI_GETCAPS 0x02
+#define VBE_DISPI_8BIT_DAC 0x20
+#define VBE_DISPI_LFB_ENABLED 0x40
+#define VBE_DISPI_NOCLEARMEM 0x80
+
+#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xF1000000
#ifdef CONFIG_BOCHS_VBE
"xenfv",
"Xen Fully-virtualized PC",
xen_init_fv,
- (VGA_RAM_SIZE + BIOS_SIZE) | RAMSIZE_FIXED,
+ BIOS_SIZE | RAMSIZE_FIXED,
.max_cpus = 1,
};
"xenpv",
"Xen Para-virtualized PC",
xen_init_pv,
- (VGA_RAM_SIZE + BIOS_SIZE) | RAMSIZE_FIXED,
+ BIOS_SIZE | RAMSIZE_FIXED,
.max_cpus = 1,
};
/* vl.c */
extern int restore;
+extern int vga_ram_size;
/* xen_machine_fv.c */
/* xen_platform.c */
#ifndef QEMU_TOOL
void pci_xen_platform_init(PCIBus *bus);
-void xen_vga_populate_vram(uint64_t vram_addr);
-void xen_vga_vram_map(uint64_t vram_addr);
+void xen_vga_populate_vram(uint64_t vram_addr, uint32_t size);
+void xen_vga_vram_map(uint64_t vram_addr, uint32_t size);
+void set_vram_mapping(void *opaque, unsigned long begin, unsigned long end);
+void unset_vram_mapping(void *opaque);
#endif
void ide_unplug_harddisks(void);
int nb_drives;
/* point to the block driver where the snapshots are managed */
static BlockDriverState *bs_snapshots;
-static int vga_ram_size;
enum vga_retrace_method vga_retrace_method = VGA_RETRACE_DUMB;
static DisplayState display_state;
int nographic;
static int rtc_date_offset = -1; /* -1 means no change */
int cirrus_vga_enabled = 1;
int vmsvga_enabled = 0;
+int vga_ram_size = 4 * 1024 * 1024;
#ifdef TARGET_SPARC
+vga_ram_size += 1024 * 1024;
int graphic_width = 1024;
int graphic_height = 768;
int graphic_depth = 8;
#ifdef TARGET_I386
"-std-vga simulate a standard VGA card with VESA Bochs Extensions\n"
" (default is CL-GD5446 PCI VGA)\n"
+ "-videoram set amount of memory available to virtual video adapter\n"
"-no-acpi disable ACPI\n"
#endif
#ifdef CONFIG_CURSES
QEMU_OPTION_g,
QEMU_OPTION_vga,
QEMU_OPTION_std_vga,
+ QEMU_OPTION_videoram,
QEMU_OPTION_echr,
QEMU_OPTION_monitor,
QEMU_OPTION_domainname,
#endif
{ "localtime", 0, QEMU_OPTION_localtime },
{ "std-vga", 0, QEMU_OPTION_std_vga },
+ { "videoram", HAS_ARG, QEMU_OPTION_videoram },
{ "vga", HAS_ARG, QEMU_OPTION_vga },
{ "echr", HAS_ARG, QEMU_OPTION_echr },
{ "monitor", HAS_ARG, QEMU_OPTION_monitor },
cpu_model = NULL;
initrd_filename = NULL;
ram_size = 0;
- vga_ram_size = VGA_RAM_SIZE;
#ifdef CONFIG_GDBSTUB
use_gdbstub = 0;
gdbstub_port = DEFAULT_GDBSTUB_PORT;
case QEMU_OPTION_vga:
select_vgahw (optarg);
break;
+ case QEMU_OPTION_videoram:
+ {
+ char *ptr;
+ vga_ram_size = strtol(optarg,&ptr,10);
+ vga_ram_size *= 1024 * 1024;
+#ifdef TARGET_SPARC
+ vga_ram_size += (1024 * 1024);
+#endif
+ }
+ break;
case QEMU_OPTION_g:
{
const char *p;
#endif
/* init the memory */
- phys_ram_size = machine->ram_require & ~RAMSIZE_FIXED;
+
+ /* If we're on cirrus, set vga_ram_size to 4M whatever the videoram option might have set it to */
+ if ( cirrus_vga_enabled && vga_ram_size != 4 * 1024 * 1024 )
+ {
+ fprintf(stderr,"-videoram option does not work with cirrus vga device model. Videoram set to 4M.\n");
+ vga_ram_size = 4 * 1024 * 1024;
+ }
+
+ phys_ram_size = (machine->ram_require + vga_ram_size) & ~RAMSIZE_FIXED;
if (machine->ram_require & RAMSIZE_FIXED) {
if (ram_size > 0) {
static unsigned char linux2scancode[KEY_MAX + 1];
+extern uint32_t vga_ram_size;
+
int xenfb_connect_vkbd(const char *path)
{
kbd_path = strdup(path);
fbfront_resize(fb_dev, ds->width, ds->height, ds->linesize, ds->depth, offset);
} else {
ds->data = xs->nonshared_vram;
- fbfront_resize(fb_dev, w, h, linesize, ds->depth, VGA_RAM_SIZE);
+ fbfront_resize(fb_dev, w, h, linesize, ds->depth, vga_ram_size);
}
}
create_thread("kbdfront", kbdfront_thread, (void*) xs);
- ds->data = xs->nonshared_vram = qemu_memalign(PAGE_SIZE, VGA_RAM_SIZE);
- memset(ds->data, 0, VGA_RAM_SIZE);
+ ds->data = xs->nonshared_vram = qemu_memalign(PAGE_SIZE, vga_ram_size);
+ memset(ds->data, 0, vga_ram_size);
ds->opaque = xs;
ds->depth = 32;
ds->bgr = 0;
int kbd_fd, fb_fd;
int offset = 0;
unsigned long *mfns;
- int n = VGA_RAM_SIZE / PAGE_SIZE;
+ int n = vga_ram_size / PAGE_SIZE;
int i;
if (!fb_path || !kbd_path)
if (ds->shared_buf) {
offset = (void*) ds->data - xs->vga_vram;
} else {
- offset = VGA_RAM_SIZE;
+ offset = vga_ram_size;
ds->data = xs->nonshared_vram;
}
if (offset)
projects / xenclient / ioemu.git / commitdiff