]> xenbits.xensource.com Git - xen.git/commitdiff
x86/emulate: Remove HAVE_AS_SSE4_2
authorDenis Mukhin <dmukhin@ford.com>
Thu, 3 Apr 2025 18:23:19 +0000 (18:23 +0000)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Thu, 3 Apr 2025 20:29:34 +0000 (21:29 +0100)
The new toolchain baseline knows the CRC32 instructions; no need to carry the
workaround in the code.

Resolves: https://gitlab.com/xen-project/xen/-/work_items/206
Signed-off-by: Denis Mukhin <dmukhin@ford.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
xen/arch/x86/arch.mk
xen/arch/x86/x86_emulate/x86_emulate.c

index dcc8c3c330dcc2d54845394e82167dc1539f1c33..3bbaee2a4404141e37e794c988a7e2a2be49437b 100644 (file)
@@ -10,7 +10,6 @@ CFLAGS += -msoft-float
 
 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
 $(call cc-option-add,CFLAGS,CC,-Wnested-externs)
-$(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2)
 $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND)
 $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT)
 $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED)
index 535d803588df544b6800893d3c72b35a7d58e227..55d36b9a264759f9a8e38a369fec048c17d372d9 100644 (file)
@@ -6882,7 +6882,7 @@ x86_emulate(
             goto unhandleable;
         }
         break;
-#ifdef HAVE_AS_SSE4_2
+
     case X86EMUL_OPC_F2(0x0f38, 0xf0): /* crc32 r/m8, r{32,64} */
     case X86EMUL_OPC_F2(0x0f38, 0xf1): /* crc32 r/m{16,32,64}, r{32,64} */
         host_and_vcpu_must_have(sse4_2);
@@ -6901,17 +6901,16 @@ x86_emulate(
             asm ( "crc32l %1,%k0" : "+r" (dst.val)
                                   : "rm" (*(uint32_t *)&src.val) );
             break;
-# ifdef __x86_64__
+#ifdef __x86_64__
         case 8:
             asm ( "crc32q %1,%0" : "+r" (dst.val) : "rm" (src.val) );
             break;
-# endif
+#endif
         default:
             ASSERT_UNREACHABLE();
             goto unhandleable;
         }
         break;
-#endif
 
     case X86EMUL_OPC_VEX(0x0f38, 0xf2):    /* andn r/m,r,r */
     case X86EMUL_OPC_VEX(0x0f38, 0xf5):    /* bzhi r,r/m,r */