GT64120State *s;
PCIDevice *d;
+ (void)&pci_host_data_writeb; /* avoid warning */
+ (void)&pci_host_data_writew; /* avoid warning */
+ (void)&pci_host_data_readb; /* avoid warning */
+ (void)&pci_host_data_readw; /* avoid warning */
+
s = qemu_mallocz(sizeof(GT64120State));
s->pci = qemu_mallocz(sizeof(GT64120PCIState));
static inline CPU86_LDouble helper_fldt(target_ulong ptr)
{
- return *(CPU86_LDouble *)ptr;
+ return *(CPU86_LDouble *)(unsigned long)ptr;
}
static inline void helper_fstt(CPU86_LDouble f, target_ulong ptr)
{
- *(CPU86_LDouble *)ptr = f;
+ *(CPU86_LDouble *)(unsigned long)ptr = f;
}
#else
break;
case 0x01c00a04: /* MXCC control register */
if (size == 4)
- env->mxccregs[3] = (env->mxccregs[0xa] & 0xffffffff00000000) | T1;
+ env->mxccregs[3] = (env->mxccregs[0xa] & 0xffffffff00000000ULL) | T1;
else
DPRINTF_MXCC("%08x: unimplemented access size: %d\n", T0, size);
break;