]> xenbits.xensource.com Git - people/royger/xen.git/commitdiff
Temporarily revert "amd/msr: allow passthrough of VIRT_SPEC_CTRL for HVM guests"
authorGeorge Dunlap <george.dunlap@citrix.com>
Fri, 19 Aug 2022 19:17:30 +0000 (20:17 +0100)
committerGeorge Dunlap <george.dunlap@citrix.com>
Fri, 19 Aug 2022 19:21:57 +0000 (20:21 +0100)
A person tagged in commit a2eeaa6906101fbf322766f37f8f061dd36fe58d
claims the tag is in accurate; revert this commit so that we can
re-commit it again with the tag corrected.

Signed-off-by: George Dunlap <george.dunlap@citrix.com>
xen/arch/x86/cpuid.c
xen/arch/x86/hvm/svm/entry.S
xen/arch/x86/hvm/svm/svm.c
xen/arch/x86/include/asm/cpufeatures.h
xen/arch/x86/include/asm/msr.h
xen/arch/x86/msr.c
xen/arch/x86/spec_ctrl.c

index a4a366ad8419b8f660b8c66d02ceaddee99edb08..979dcf8164846496414106e05757818d1a5b6422 100644 (file)
@@ -541,13 +541,6 @@ static void __init calculate_hvm_max_policy(void)
          raw_cpuid_policy.basic.sep )
         __set_bit(X86_FEATURE_SEP, hvm_featureset);
 
-    /*
-     * VIRT_SSBD is exposed in the default policy as a result of
-     * VIRT_SC_MSR_HVM being set, it also needs exposing in the max policy.
-     */
-    if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) )
-        __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset);
-
     /*
      * If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional
      * availability, or admin choice), hide the feature.
@@ -604,13 +597,6 @@ static void __init calculate_hvm_def_policy(void)
     guest_common_feature_adjustments(hvm_featureset);
     guest_common_default_feature_adjustments(hvm_featureset);
 
-    /*
-     * Only expose VIRT_SSBD if AMD_SSBD is not available, and thus
-     * VIRT_SC_MSR_HVM is set.
-     */
-    if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) )
-        __set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset);
-
     sanitise_featureset(hvm_featureset);
     cpuid_featureset_to_policy(hvm_featureset, p);
     recalculate_xstate(p);
index a26589aa9a96186a053a95ac2db303cb5c32ff11..a60d759f71086d628379acaa512ef54adf842285 100644 (file)
@@ -19,8 +19,6 @@
 
         .file "svm/entry.S"
 
-#include <xen/lib.h>
-
 #include <asm/asm_defns.h>
 #include <asm/page.h>
 
@@ -59,9 +57,6 @@ __UNLIKELY_END(nsvm_hap)
 
         clgi
 
-        ALTERNATIVE "", STR(call vmentry_virt_spec_ctrl), \
-                        X86_FEATURE_VIRT_SC_MSR_HVM
-
         /* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
         /* SPEC_CTRL_EXIT_TO_SVM       Req: b=curr %rsp=regs/cpuinfo, Clob: acd */
         .macro svm_vmentry_spec_ctrl
@@ -131,9 +126,6 @@ __UNLIKELY_END(nsvm_hap)
         ALTERNATIVE "", svm_vmexit_spec_ctrl, X86_FEATURE_SC_MSR_HVM
         /* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */
 
-        ALTERNATIVE "", STR(call vmexit_virt_spec_ctrl), \
-                        X86_FEATURE_VIRT_SC_MSR_HVM
-
         /*
          * STGI is executed unconditionally, and is sufficiently serialising
          * to safely resolve any Spectre-v1 concerns in the above logic.
index 53ce2edd358fc66cfb7129745e506866e4753a8b..0849a9dc5f41ea42f81006be8f5ff1613d9e9140 100644 (file)
@@ -52,7 +52,6 @@
 #include <asm/hvm/svm/svmdebug.h>
 #include <asm/hvm/svm/nestedsvm.h>
 #include <asm/hvm/nestedhvm.h>
-#include <asm/spec_ctrl.h>
 #include <asm/x86_emulate.h>
 #include <public/sched.h>
 #include <asm/hvm/vpt.h>
@@ -611,16 +610,6 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v)
     svm_intercept_msr(v, MSR_SPEC_CTRL,
                       cp->extd.ibrs ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_RW);
 
-    /*
-     * Always trap write accesses to VIRT_SPEC_CTRL in order to cache the guest
-     * setting and avoid having to perform a rdmsr on vmexit to get the guest
-     * setting even if VIRT_SSBD is offered to Xen itself.
-     */
-    svm_intercept_msr(v, MSR_VIRT_SPEC_CTRL,
-                      cp->extd.virt_ssbd && cpu_has_virt_ssbd &&
-                      !cpu_has_amd_ssbd ?
-                      MSR_INTERCEPT_WRITE : MSR_INTERCEPT_RW);
-
     /* Give access to MSR_PRED_CMD if the guest has been told about it. */
     svm_intercept_msr(v, MSR_PRED_CMD,
                       cp->extd.ibpb ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_RW);
@@ -3116,30 +3105,6 @@ void svm_vmexit_handler(struct cpu_user_regs *regs)
     vmcb_set_vintr(vmcb, intr);
 }
 
-/* Called with GIF=0. */
-void vmexit_virt_spec_ctrl(void)
-{
-    unsigned int val = opt_ssbd ? SPEC_CTRL_SSBD : 0;
-
-    if ( val == current->arch.msrs->virt_spec_ctrl.raw )
-        return;
-
-    if ( cpu_has_virt_ssbd )
-        wrmsr(MSR_VIRT_SPEC_CTRL, val, 0);
-}
-
-/* Called with GIF=0. */
-void vmentry_virt_spec_ctrl(void)
-{
-    unsigned int val = current->arch.msrs->virt_spec_ctrl.raw;
-
-    if ( val == (opt_ssbd ? SPEC_CTRL_SSBD : 0) )
-        return;
-
-    if ( cpu_has_virt_ssbd )
-        wrmsr(MSR_VIRT_SPEC_CTRL, val, 0);
-}
-
 /*
  * Local variables:
  * mode: C
index 3895de4faf8f2b11666b24d470ac189d3319a295..672c9ee22ba2bc75dba79d2e9ded86e167c0765b 100644 (file)
@@ -24,7 +24,7 @@ XEN_CPUFEATURE(APERFMPERF,        X86_SYNTH( 8)) /* APERFMPERF */
 XEN_CPUFEATURE(MFENCE_RDTSC,      X86_SYNTH( 9)) /* MFENCE synchronizes RDTSC */
 XEN_CPUFEATURE(XEN_SMEP,          X86_SYNTH(10)) /* SMEP gets used by Xen itself */
 XEN_CPUFEATURE(XEN_SMAP,          X86_SYNTH(11)) /* SMAP gets used by Xen itself */
-XEN_CPUFEATURE(VIRT_SC_MSR_HVM,   X86_SYNTH(12)) /* MSR_VIRT_SPEC_CTRL exposed to HVM */
+/* Bit 12 - unused. */
 XEN_CPUFEATURE(IND_THUNK_LFENCE,  X86_SYNTH(13)) /* Use IND_THUNK_LFENCE */
 XEN_CPUFEATURE(IND_THUNK_JMP,     X86_SYNTH(14)) /* Use IND_THUNK_JMP */
 XEN_CPUFEATURE(SC_NO_BRANCH_HARDEN, X86_SYNTH(15)) /* (Disable) Conditional branch hardening */
index de18e90b2ecf5f206bcf288cfe97a631f8b197c2..ab6fbb50516122c82718c1ebbdf2458b04483135 100644 (file)
@@ -375,16 +375,6 @@ struct vcpu_msrs
      */
     uint32_t tsc_aux;
 
-    /*
-     * 0xc001011f - MSR_VIRT_SPEC_CTRL (if !X86_FEATURE_AMD_SSBD)
-     *
-     * AMD only. Guest selected value, context switched on guest VM
-     * entry/exit.
-     */
-    struct {
-        uint32_t raw;
-    } virt_spec_ctrl;
-
     /*
      * 0xc00110{27,19-1b} MSR_AMD64_DR{0-3}_ADDRESS_MASK
      *
index 95416995a5ab185fd3bbb62d99b8da2cd0300bdd..2ae1fcfd5f7902b541c0ed66cec9265185815f67 100644 (file)
@@ -393,10 +393,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
         if ( !cp->extd.virt_ssbd )
             goto gp_fault;
 
-        if ( cpu_has_amd_ssbd )
-            *val = msrs->spec_ctrl.raw & SPEC_CTRL_SSBD;
-        else
-            *val = msrs->virt_spec_ctrl.raw;
+        *val = msrs->spec_ctrl.raw & SPEC_CTRL_SSBD;
         break;
 
     case MSR_AMD64_DE_CFG:
@@ -689,15 +686,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
             goto gp_fault;
 
         /* Only supports SSBD bit, the rest are ignored. */
-        if ( cpu_has_amd_ssbd )
-        {
-            if ( val & SPEC_CTRL_SSBD )
-                msrs->spec_ctrl.raw |= SPEC_CTRL_SSBD;
-            else
-                msrs->spec_ctrl.raw &= ~SPEC_CTRL_SSBD;
-        }
+        if ( val & SPEC_CTRL_SSBD )
+            msrs->spec_ctrl.raw |= SPEC_CTRL_SSBD;
         else
-            msrs->virt_spec_ctrl.raw = val & SPEC_CTRL_SSBD;
+            msrs->spec_ctrl.raw &= ~SPEC_CTRL_SSBD;
         break;
 
     case MSR_AMD64_DE_CFG:
index ec44205309fc56604335f5649206fe4ecc2e5975..96e7f0983a34b02e1ce6148283feb5a035b42b4e 100644 (file)
@@ -513,12 +513,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
            (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ||
             boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ||
             boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM) ||
-            boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) ||
             opt_eager_fpu || opt_md_clear_hvm)       ? ""               : " None",
            boot_cpu_has(X86_FEATURE_SC_MSR_HVM)      ? " MSR_SPEC_CTRL" : "",
-           (boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ||
-            boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM)) ? " MSR_VIRT_SPEC_CTRL"
-                                                       : "",
+           boot_cpu_has(X86_FEATURE_SC_MSR_HVM)      ? " MSR_VIRT_SPEC_CTRL" : "",
            boot_cpu_has(X86_FEATURE_SC_RSB_HVM)      ? " RSB"           : "",
            opt_eager_fpu                             ? " EAGER_FPU"     : "",
            opt_md_clear_hvm                          ? " MD_CLEAR"      : "",
@@ -1243,10 +1240,6 @@ void __init init_speculation_mitigations(void)
             setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM);
     }
 
-    /* Support VIRT_SPEC_CTRL.SSBD if AMD_SSBD is not available. */
-    if ( opt_msr_sc_hvm && !cpu_has_amd_ssbd && cpu_has_virt_ssbd )
-        setup_force_cpu_cap(X86_FEATURE_VIRT_SC_MSR_HVM);
-
     /* Figure out default_xen_spec_ctrl. */
     if ( has_spec_ctrl && ibrs )
     {