]> xenbits.xensource.com Git - ovmf.git/commitdiff
UefiCpuPkg/CpuDxe: Substract TME-MK KEY_ID_BITS from CPU max PA
authorRay Ni <ray.ni@intel.com>
Mon, 27 Feb 2023 05:44:29 +0000 (13:44 +0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Sat, 1 Apr 2023 01:08:34 +0000 (01:08 +0000)
CPUID enumeration of MAX_PA is unaffected by TME-MK activation and
will continue to report the maximum physical address bits available
for software to use, irrespective of the number of KeyID bits.

So, we need to check if TME is enabled and adjust the PA size
accordingly.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ahmad Anadani <ahmad.anadani@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
UefiCpuPkg/CpuDxe/CpuDxe.c

index 920976c5766b4b2964238fb3edb53b1da6cc2eff..3febd59d99e0db61a31508d115b4c05f4371f3aa 100644 (file)
@@ -505,8 +505,11 @@ InitializeMtrrMask (
   VOID\r
   )\r
 {\r
-  UINT32                          MaxExtendedFunction;\r
-  CPUID_VIR_PHY_ADDRESS_SIZE_EAX  VirPhyAddressSize;\r
+  UINT32                                       MaxExtendedFunction;\r
+  CPUID_VIR_PHY_ADDRESS_SIZE_EAX               VirPhyAddressSize;\r
+  UINT32                                       MaxFunction;\r
+  CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX  ExtendedFeatureFlagsEcx;\r
+  MSR_IA32_TME_ACTIVATE_REGISTER               TmeActivate;\r
 \r
   AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);\r
 \r
@@ -516,6 +519,23 @@ InitializeMtrrMask (
     VirPhyAddressSize.Bits.PhysicalAddressBits = 36;\r
   }\r
 \r
+  //\r
+  // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue\r
+  // to report the maximum physical address bits available for software to use,\r
+  // irrespective of the number of KeyID bits.\r
+  // So, we need to check if TME is enabled and adjust the PA size accordingly.\r
+  //\r
+  AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);\r
+  if (MaxFunction >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {\r
+    AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &ExtendedFeatureFlagsEcx.Uint32, NULL);\r
+    if (ExtendedFeatureFlagsEcx.Bits.TME_EN == 1) {\r
+      TmeActivate.Uint64 = AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);\r
+      if (TmeActivate.Bits.TmeEnable == 1) {\r
+        VirPhyAddressSize.Bits.PhysicalAddressBits -= TmeActivate.Bits.MkTmeKeyidBits;\r
+      }\r
+    }\r
+  }\r
+\r
   mValidMtrrBitsMask    = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;\r
   mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;\r
 }\r