Undo incorrect assumptions about Xen in commit 6ca0460f.

Xen invokes SeaBIOS via entry_post, not entry_elf.  As a result commit
6ca0460f broke Xen.  This change effectively undoes that commit.

Signed-off-by: Kevin O'Connor <kevin@koconnor.net>

diff --git a/src/post.c b/src/post.c
index f2fabbb656e2e084f2bed6d7ddf4f1408f05979a..9930ae5144e56e39bb02770ea42c5ab02f1ad2e6 100644 (file)
--- a/src/post.c
+++ b/src/post.c
@@ -315,9 +315,6 @@ reloc_preinit(void *f, void *arg)
 void VISIBLE32INIT
 dopost(void)
 {
-    // Check if we are running under Xen.
-    xen_preinit();
-
     // Detect ram and setup internal malloc.
     qemu_cfg_preinit();
     if (CONFIG_COREBOOT)
@@ -332,30 +329,17 @@ dopost(void)
     reloc_preinit(maininit, NULL);
 }
 
-// Startup debug output and display software version.
-static void
-debug_splash(void)
+// Entry point for Power On Self Test (POST) - the BIOS initilization
+// phase.  This function makes the memory at 0xc0000-0xfffff
+// read/writable and then calls dopost().
+void VISIBLE32FLAT
+handle_post(void)
 {
     debug_serial_preinit();
     dprintf(1, "Start bios (version %s)\n", VERSION);
-}
 
-// Entry point for Power On Self Test (POST) when running under
-// xen/coreboot.
-void VISIBLE32INIT
-handle_elf(void)
-{
-    debug_splash();
-    dopost();
-}
-
-// Entry point for Power On Self Test (POST) when running under
-// qemu/kvm/bochs.  Under qemu the memory at 0xc0000-0xfffff may be
-// read-only, so unlock the ram as the first step of booting.
-void VISIBLE32FLAT
-handle_post(void)
-{
-    debug_splash();
+    // Check if we are running under Xen.
+    xen_preinit();
 
     // Allow writes to modify bios area (0xf0000)
     make_bios_writable();

diff --git a/src/romlayout.S b/src/romlayout.S
index a35109169a00604d6ad88b90e3bdfc3ddc59faa8..cbe6b1c61c0c5070b5a8a64694b817077986b969 100644 (file)
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -380,7 +380,7 @@ entry_elf:
         movw %ax, %gs
         movw %ax, %ss
         movl $BUILD_STACK_ADDR, %esp
-        ljmpl $SEG32_MODE32_CS, $_cfunc32flat_handle_elf
+        ljmpl $SEG32_MODE32_CS, $_cfunc32flat_handle_post
 
         .code16gcc