dm = xendevicemodel_open(NULL, 0, 0, NULL);
xendevicemodel_shutdown(dm);
+ xendevicemodel_set_pci_intx_level(dm, 0, 0, 0, 0, 0);
return 0;
}
EOF
#define xendevicemodel_s3_awaken(h) \
xc_set_hvm_param(h, xen_domid, HVM_PARAM_ACPI_S_STATE, 0);
+#define xendevicemodel_set_pci_intx_level(h, d, b, dv, i, a) \
+ xc_hvm_set_pci_intx_level(h, xen_domid, b, d, dv, i, a)
+#define xendevicemodel_route_pci_intx_to_isa_irq(h, ix, ii) \
+ xc_hvm_set_pci_link_route(h, xen_domid, ix, ii)
+#define xendevicemodel_set_isa_irq_level(h, i, a) \
+ xc_hvm_set_isa_irq_level(h, xen_domid, i, a)
+
#endif
/* Xen before 4.6 */
void xen_piix3_set_irq(void *opaque, int irq_num, int level)
{
- xc_hvm_set_pci_intx_level(xen_xc, xen_domid, 0, 0, irq_num >> 2,
- irq_num & 3, level);
+ xendevicemodel_set_pci_intx_level(xen_dm, 0, 0,
+ irq_num >> 2, irq_num & 3,
+ !!level);
}
void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int len)
}
v &= 0xf;
if (((address + i) >= 0x60) && ((address + i) <= 0x63)) {
- xc_hvm_set_pci_link_route(xen_xc, xen_domid, address + i - 0x60, v);
+ xendevicemodel_route_pci_intx_to_isa_irq(xen_dm,
+ address + i - 0x60, v);
}
}
}
static void xen_set_irq(void *opaque, int irq, int level)
{
- xc_hvm_set_isa_irq_level(xen_xc, xen_domid, irq, level);
+ xendevicemodel_set_isa_irq_level(xen_dm, irq, level);
}
qemu_irq *xen_interrupt_controller_init(void)