custom_param("mce_verbosity", mce_set_verbosity);
/* Handle unconfigured int18 (should never happen) */
-static void unexpected_machine_check(const struct cpu_user_regs *regs, long error_code)
+static void unexpected_machine_check(const struct cpu_user_regs *regs)
{
console_force_unlock();
printk("Unexpected Machine Check Exception\n");
/* Call the installed machine check handler for this CPU setup. */
-void machine_check_vector(const struct cpu_user_regs *regs, long error_code)
+void do_machine_check(const struct cpu_user_regs *regs)
{
- _machine_check_vector(regs, error_code);
+ _machine_check_vector(regs);
}
/* Init machine check callback handler
}
/* Shared #MC handler. */
-void mcheck_cmn_handler(const struct cpu_user_regs *regs, long error_code,
- struct mca_banks *bankmask, struct mca_banks *clear_bank)
+void mcheck_cmn_handler(const struct cpu_user_regs *regs)
{
+ struct mca_banks *bankmask = mca_allbanks;
+ struct mca_banks *clear_bank = __get_cpu_var(mce_clear_banks);
uint64_t gstatus;
mctelem_cookie_t mctc = NULL;
struct mca_summary bs;
uint32_t *, uint32_t *, uint32_t *, uint32_t *);
/* Register a handler for machine check exceptions. */
-typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *, long);
+typedef void (*x86_mce_vector_t)(const struct cpu_user_regs *regs);
extern void x86_mce_vector_register(x86_mce_vector_t);
/* Common generic MCE handler that implementations may nominate
* via x86_mce_vector_register. */
-extern void mcheck_cmn_handler(const struct cpu_user_regs *, long,
- struct mca_banks *, struct mca_banks *);
+extern void mcheck_cmn_handler(const struct cpu_user_regs *regs);
/* Register a handler for judging whether mce is recoverable. */
typedef int (*mce_recoverable_t)(uint64_t status);
return mc_ext;
}
-/* Common AMD Machine Check Handler for AMD K8 and higher */
-static void amd_cmn_machine_check(const struct cpu_user_regs *regs, long error_code)
-{
- mcheck_cmn_handler(regs, error_code, mca_allbanks,
- __get_cpu_var(mce_clear_banks));
-}
-
static int amd_need_clearbank_scan(enum mca_source who, uint64_t status)
{
if ( who != MCA_MCE_SCAN )
/* Assume that machine check support is available.
* The minimum provided support is at least the K8. */
mce_handler_init();
- x86_mce_vector_register(amd_cmn_machine_check);
+ x86_mce_vector_register(mcheck_cmn_handler);
mce_need_clearbank_register(amd_need_clearbank_scan);
for ( i = 0; i < nr_mce_banks; i++ )
{intel_default_check, intel_default_mce_uhandler}
};
-static void intel_machine_check(const struct cpu_user_regs * regs, long error_code)
-{
- mcheck_cmn_handler(regs, error_code, mca_allbanks,
- __get_cpu_var(mce_clear_banks));
-}
-
/* According to MCA OS writer guide, CMCI handler need to clear bank when
* 1) CE (UC = 0)
* 2) ser_support = 1, Superious error, OVER = 0, EN = 0, [UC = 1]
if (firstbank) /* if cmci enabled, firstbank = 0 */
wrmsrl(MSR_IA32_MC0_STATUS, 0x0ULL);
- x86_mce_vector_register(intel_machine_check);
+ x86_mce_vector_register(mcheck_cmn_handler);
mce_recoverable_register(intel_recoverable_scan);
mce_need_clearbank_register(intel_need_clearbank_scan);
mce_register_addrcheck(intel_checkaddr);
do_guest_trap(TRAP_int3, regs, 0);
}
-void do_machine_check(const struct cpu_user_regs *regs)
-{
- machine_check_vector(regs, regs->error_code);
-}
-
static void reserved_bit_page_fault(
unsigned long addr, struct cpu_user_regs *regs)
{
struct cpu_user_regs;
-extern void machine_check_vector(const struct cpu_user_regs *regs, long error_code);
-
void async_exception_cleanup(struct vcpu *);
/**