arm/gic: Fix SPIs check

diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c
index 6baaf9cb88706afb07da06eeb6a51e10df505980..26d5a642af51dd26a7407ad8643b67a419ca0a60 100644 (file)
--- a/sys/arm/arm/gic.c
+++ b/sys/arm/arm/gic.c
@@ -221,15 +221,16 @@ gic_decode_fdt(uint32_t iparent, uint32_t *intr, int *interrupt,
                 *   2 = high-to-low edge triggered
                 *   4 = active high level-sensitive
                 *   8 = active low level-sensitive
-                * The hardware only supports active-high-level or rising-edge.
+                * The hardware only supports active-high-level or rising-edge
+                * for SPIs
                 */
-               if (fdt32_to_cpu(intr[2]) & 0x0a) {
+               if (*interrupt >= 32 && fdt32_to_cpu(intr[2]) & 0x0a) {
                        printf("unsupported trigger/polarity configuration "
                            "0x%2x\n", fdt32_to_cpu(intr[2]) & 0x0f);
                        return (ENOTSUP);
                }
                *pol  = INTR_POLARITY_CONFORM;
-               if (fdt32_to_cpu(intr[2]) & 0x01)
+               if (fdt32_to_cpu(intr[2]) & 0x03)
                        *trig = INTR_TRIGGER_EDGE;
                else
                        *trig = INTR_TRIGGER_LEVEL;