]> xenbits.xensource.com Git - people/sstabellini/xen-unstable.git/.git/commitdiff
x86/boot: Set Accessed bits in boot_cpu_{,compat_}gdt_table[]
authorAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 7 Aug 2019 11:29:01 +0000 (12:29 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Wed, 7 Aug 2019 12:34:56 +0000 (13:34 +0100)
There is no point causing the CPU to performed a locked update of the
descriptors on first use.

Reported-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/boot/x86_64.S

index cf47e019f5c0599996fc8ea5da85ffd2a78f2f75..0eaf9d2a07116b32434e6ce1ed516690af74ab5e 100644 (file)
@@ -55,13 +55,13 @@ GLOBAL(stack_start)
         .align PAGE_SIZE, 0
 GLOBAL(boot_cpu_gdt_table)
         .quad 0x0000000000000000     /* unused */
-        .quad 0x00af9a000000ffff     /* 0xe008 ring 0 code, 64-bit mode   */
-        .quad 0x00cf92000000ffff     /* 0xe010 ring 0 data                */
+        .quad 0x00af9b000000ffff     /* 0xe008 ring 0 code, 64-bit mode   */
+        .quad 0x00cf93000000ffff     /* 0xe010 ring 0 data                */
         .quad 0x0000000000000000     /* reserved                          */
-        .quad 0x00cffa000000ffff     /* 0xe023 ring 3 code, compatibility */
-        .quad 0x00cff2000000ffff     /* 0xe02b ring 3 data                */
-        .quad 0x00affa000000ffff     /* 0xe033 ring 3 code, 64-bit mode   */
-        .quad 0x00cf9a000000ffff     /* 0xe038 ring 0 code, compatibility */
+        .quad 0x00cffb000000ffff     /* 0xe023 ring 3 code, compatibility */
+        .quad 0x00cff3000000ffff     /* 0xe02b ring 3 data                */
+        .quad 0x00affb000000ffff     /* 0xe033 ring 3 code, 64-bit mode   */
+        .quad 0x00cf9b000000ffff     /* 0xe038 ring 0 code, compatibility */
         .fill (PER_CPU_GDT_ENTRY - __HYPERVISOR_CS32 / 8 - 1), 8, 0
         .quad 0x0000910000000000     /* per-CPU entry (limit == cpu)      */
 
@@ -70,13 +70,13 @@ GLOBAL(boot_cpu_gdt_table)
 /*     (compatibility) machine->physical mapping table lives there.       */
 GLOBAL(boot_cpu_compat_gdt_table)
         .quad 0x0000000000000000     /* unused */
-        .quad 0x00af9a000000ffff     /* 0xe008 ring 0 code, 64-bit mode   */
-        .quad 0x00cf92000000ffff     /* 0xe010 ring 0 data                */
-        .quad 0x00cfba000000ffff     /* 0xe019 ring 1 code, compatibility */
-        .quad 0x00cfb2000000ffff     /* 0xe021 ring 1 data                */
-        .quad 0x00cffa000000ffff     /* 0xe02b ring 3 code, compatibility */
-        .quad 0x00cff2000000ffff     /* 0xe033 ring 3 data                */
-        .quad 0x00cf9a000000ffff     /* 0xe038 ring 0 code, compatibility */
+        .quad 0x00af9b000000ffff     /* 0xe008 ring 0 code, 64-bit mode   */
+        .quad 0x00cf93000000ffff     /* 0xe010 ring 0 data                */
+        .quad 0x00cfbb000000ffff     /* 0xe019 ring 1 code, compatibility */
+        .quad 0x00cfb3000000ffff     /* 0xe021 ring 1 data                */
+        .quad 0x00cffb000000ffff     /* 0xe02b ring 3 code, compatibility */
+        .quad 0x00cff3000000ffff     /* 0xe033 ring 3 data                */
+        .quad 0x00cf9b000000ffff     /* 0xe038 ring 0 code, compatibility */
         .fill (PER_CPU_GDT_ENTRY - __HYPERVISOR_CS32 / 8 - 1), 8, 0
         .quad 0x0000910000000000     /* per-CPU entry (limit == cpu)      */
         .align PAGE_SIZE, 0