]> xenbits.xensource.com Git - unikraft/unikraft.git/commitdiff
plat/common: Adapt common code to the new uk_intctlr API
authorMichalis Pappas <michalis@unikraft.io>
Tue, 19 Sep 2023 14:48:29 +0000 (16:48 +0200)
committerRazvan Deaconescu <razvand@unikraft.io>
Fri, 20 Oct 2023 16:35:55 +0000 (19:35 +0300)
Notice: Picking individual commits in this PR will break the build.

Signed-off-by: Michalis Pappas <michalis@unikraft.io>
Reviewed-by: Marco Schlumpp <marco@unikraft.io>
Reviewed-by: Sergiu Moga <sergiu@unikraft.io>
Approved-by: Razvan Deaconescu <razvand@unikraft.io>
GitHub-Closes: #1103

plat/Config.uk
plat/common/arm/generic_timer.c
plat/common/arm/time.c
plat/common/include/uk/plat/common/cpu.h
plat/common/lcpu.c
plat/common/x86/lcpu.c
plat/drivers/rtc/pl031.c

index ce6ee79035d0a7945465fdcbd769bf934d26499f..764993a6882e08c4cb3a40c26db1e955546e2ea5 100644 (file)
@@ -39,7 +39,7 @@ config UKPLAT_LCPU_MAXCOUNT
 config HAVE_SMP
        bool
        default y if UKPLAT_LCPU_MAXCOUNT > 1
-       default n
+       select LIBUKINTCTLR_APIC if (ARCH_X86_64 && UKPLAT_LCPU_MAXCOUNT > 1)
        select UKPLAT_ACPI if ARCH_X86_64
 
 menu "Multiprocessor Configuration"
index d70748c597e2fbc58a48d04dd6a3ebbf1394b4e0..716c3853e5804eabe09d2c455ede184678b65078 100644 (file)
 #include <uk/assert.h>
 #include <uk/plat/time.h>
 #include <uk/plat/lcpu.h>
-#include <uk/plat/irq.h>
 #include <uk/bitops.h>
 #include <uk/plat/common/cpu.h>
-#include <uk/ofw/gic_fdt.h>
-#include <uk/plat/common/irq.h>
-#include <uk/intctlr/gic.h>
 #include <arm/time.h>
 
 static uint64_t boot_ticks;
index 7f317b3219bfc8e60bb45fe58a2e7aab42de465b..8d89036a098581217ee5e8246a86669a7def487a 100644 (file)
 #include <uk/assert.h>
 #include <uk/plat/time.h>
 #include <uk/plat/lcpu.h>
-#include <uk/plat/irq.h>
 #include <uk/bitops.h>
 #include <uk/plat/common/cpu.h>
 #include <uk/plat/common/sections.h>
 #include <uk/plat/common/bootinfo.h>
-#include <uk/ofw/gic_fdt.h>
-#include <uk/intctlr/gic.h>
-#include <uk/plat/common/irq.h>
+#include <uk/intctlr.h>
 #include <arm/time.h>
 
 static const char * const arch_timer_list[] = {
@@ -110,9 +107,8 @@ __nsec ukplat_time_get_ticks(void)
 /* must be called before interrupts are enabled */
 void ukplat_time_init(void)
 {
-       int rc, irq, fdt_timer;
-       uint32_t irq_type, hwirq;
-       uint32_t trigger_type;
+       int rc, offs;
+       struct uk_intctlr_irq irq;
 
        dtb = (void *)ukplat_bootinfo_get()->dtb;
 
@@ -123,27 +119,25 @@ void ukplat_time_init(void)
        generic_timer_update_boot_ticks();
 
        /* Currently, we only support 1 timer per system */
-       fdt_timer = fdt_node_offset_by_compatible_list(dtb, -1,
-                                                      arch_timer_list);
-       if (fdt_timer < 0)
-               UK_CRASH("Could not find arch timer!\n");
+       offs = fdt_node_offset_by_compatible_list(dtb, -1, arch_timer_list);
+       if (unlikely(offs < 0))
+               UK_CRASH("Could not find arch timer (%d)\n", offs);
 
-       rc = generic_timer_init(fdt_timer);
-       if (rc < 0)
-               UK_CRASH("Failed to initialize platform time\n");
+       rc = generic_timer_init(offs);
+       if (unlikely(rc < 0))
+               UK_CRASH("Failed to initialize platform time (%d)\n", rc);
 
-       rc = gic_get_irq_from_dtb(dtb, fdt_timer, 2, &irq_type, &hwirq,
-                                 &trigger_type);
-       if (rc < 0)
-               UK_CRASH("Failed to find IRQ number from DTB\n");
+       rc = uk_intctlr_irq_fdt_xlat(dtb, offs, 2, &irq);
+       if (unlikely(rc < 0))
+               UK_CRASH("Could not get IRQ from dtb (%d)\n", rc);
 
-       irq = gic_irq_translate(irq_type, hwirq);
+       uk_intctlr_irq_configure(&irq);
 
-       rc = ukplat_irq_register(irq, generic_timer_irq_handler, NULL);
-       if (rc < 0)
+       rc = uk_intctlr_irq_register(irq.id, generic_timer_irq_handler, NULL);
+       if (unlikely(rc < 0))
                UK_CRASH("Failed to register timer interrupt handler\n");
-       else
-               timer_irq = irq;
+
+       timer_irq = irq.id;
 
        /*
         * Mask IRQ before scheduler start working. Otherwise we will get
index 5506c25b638b7de9e4960f968ba55ddb5b577628..723fa843b04673ceb0e4504077d3e9958847b94c 100644 (file)
@@ -33,7 +33,8 @@
 #ifndef __PLAT_CMN_CPU_H__
 #define __PLAT_CMN_CPU_H__
 
-#include <uk/arch/lcpu.h>
+#include <uk/plat/common/lcpu.h>
+
 #if defined(__X86_64__)
 #include <x86/cpu.h>
 #elif defined(__ARM_32__) || defined(__ARM_64__)
index 94ffcee640a8b2b17807d255ad00032bd704aec0..e18b3bd0b8bb1fd8d58438b064889c29aa586510 100644 (file)
 
 #include <uk/essentials.h>
 #include <uk/arch/atomic.h>
+#if CONFIG_HAVE_SMP
+#include <uk/intctlr.h>
+#endif /* CONFIG_HAVE_SMP */
 #include <uk/plat/lcpu.h>
-#include <uk/plat/irq.h>
 #include <uk/plat/time.h>
 #include <uk/plat/common/cpu.h>
 #include <uk/plat/common/lcpu.h>
@@ -329,14 +331,14 @@ int lcpu_mp_init(unsigned long run_irq, unsigned long wakeup_irq, void *arg)
                return rc;
 
        /* Register the lcpu_run and lcpu_wakeup interrupt handlers */
-       rc = ukplat_irq_register(run_irq, lcpu_ipi_run_handler, NULL);
+       rc = uk_intctlr_irq_register(run_irq, lcpu_ipi_run_handler, NULL);
        if (unlikely(rc)) {
                uk_pr_crit("Could not register handler for IPI IRQ %ld\n",
                           run_irq);
                return rc;
        }
 
-       rc = ukplat_irq_register(wakeup_irq, lcpu_ipi_wakeup_handler, NULL);
+       rc = uk_intctlr_irq_register(wakeup_irq, lcpu_ipi_wakeup_handler, NULL);
        if (unlikely(rc)) {
                uk_pr_crit("Could not register handler for wakeup IRQ %ld\n",
                           wakeup_irq);
index f988da7ef0347924946fdc08e5f1d098049cd7d9..002465a1772640cb4b7cbb7bb66b6a705e13d6c9 100644 (file)
@@ -38,7 +38,6 @@
 #include <uk/assert.h>
 #include <uk/print.h>
 #include <x86/irq.h>
-#include <uk/intctlr/apic.h>
 #include <x86/cpu.h>
 #include <x86/traps.h>
 #include <x86/delay.h>
 #include <string.h>
 #include <errno.h>
 
+#if CONFIG_LIBUKINTCTLR_APIC
+#include <uk/intctlr/apic.h>
+#endif /* CONFIG_LIBUKINTCTLR_APIC */
+
 #include "start16_helpers.h"
 
 __lcpuid lcpu_arch_id(void)
index feb419c450f2ef77c18ecc3b04c213900e2e7231..805085df5da4893d0a668f0afd14ec026e4927d9 100644 (file)
 #include <uk/essentials.h>
 #include <libfdt.h>
 #include <uk/ofw/fdt.h>
-#include <uk/ofw/gic_fdt.h>
-#include <uk/intctlr/gic.h>
+#include <uk/intctlr.h>
 #include <uk/print.h>
 #include <arm/cpu.h>
 #include <rtc/rtc.h>
 #include <rtc/pl031.h>
-#include <uk/plat/common/irq.h>
 
 static __u64 pl031_base_addr;
 static int pl031_irq;
@@ -155,41 +153,37 @@ void pl031_clear_intr(void)
 
 int pl031_register_alarm_handler(int (*handler)(void *))
 {
-       return ukplat_irq_register(pl031_irq, handler, NULL);
+       return uk_intctlr_irq_register(pl031_irq, handler, NULL);
 }
 
 int pl031_init_rtc(void *dtb)
 {
        __u64 size;
-       __u32 irq_type, hwirq, trigger_type;
-       int fdt_rtc, rc;
+       int offs, rc;
+       struct uk_intctlr_irq irq;
 
        uk_pr_info("Probing RTC...\n");
 
-       /* Search for RTC device by compatible property name. */
-       fdt_rtc = fdt_node_offset_by_compatible(dtb, -1, PL031_COMPATIBLE);
-       if (unlikely(fdt_rtc < 0)) {
-               uk_pr_err("Could not find RTC device, fdt_rtc is %d\n",
-                         fdt_rtc);
+       offs = fdt_node_offset_by_compatible(dtb, -1, PL031_COMPATIBLE);
+       if (unlikely(offs < 0)) {
+               uk_pr_err("Could not find RTC node (%d)\n", offs);
                return -EINVAL;
        }
 
-       rc = fdt_get_address(dtb, fdt_rtc, 0, &pl031_base_addr, &size);
+       rc = fdt_get_address(dtb, offs, 0, &pl031_base_addr, &size);
        if (unlikely(rc < 0)) {
                uk_pr_err("Could not get RTC address\n");
                return -EINVAL;
        }
        uk_pr_info("Found RTC at: 0x%lx\n", pl031_base_addr);
 
-       rc = gic_get_irq_from_dtb(dtb, fdt_rtc, 0, &irq_type, &hwirq,
-                                 &trigger_type);
-       if (unlikely(rc < 0)) {
-               uk_pr_err("Failed to find RTC IRQ from DTB\n");
-               return -EINVAL;
-       }
+       rc = uk_intctlr_irq_fdt_xlat(dtb, offs, 0, &irq);
+       if (unlikely(rc))
+               return rc;
+
+       uk_intctlr_irq_configure(&irq);
 
-       pl031_irq = gic_irq_translate(irq_type, hwirq);
-       uk_pr_info("RTC IRQ is: %d\n", pl031_irq);
+       pl031_irq = irq.id;
 
        if (pl031_get_status() == PL031_STATUS_DISABLED)
                pl031_enable();