]> xenbits.xensource.com Git - people/dwmw2/xen.git/commitdiff
x86/time: prevent overflow with high frequency TSCs
authorNeowutran <xen@neowutran.ovh>
Mon, 19 Dec 2022 10:34:16 +0000 (11:34 +0100)
committerJan Beulich <jbeulich@suse.com>
Mon, 19 Dec 2022 10:34:16 +0000 (11:34 +0100)
Make sure tsc_khz is promoted to a 64-bit type before multiplying by
1000 to avoid an 'overflow before widen' bug. Otherwise just above
4.294GHz the value will overflow. Processors with clocks this high are
now in production and require this to work correctly.

Signed-off-by: Neowutran <xen@neowutran.ovh>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
xen/arch/x86/time.c

index b01acd390dc1dc2214b4a40f92c3b43ae5b6c6b8..d882b43cf0715f9556f7e60dcc3e3fedec77e58c 100644 (file)
@@ -2585,7 +2585,7 @@ int tsc_set_info(struct domain *d,
     case TSC_MODE_ALWAYS_EMULATE:
         d->arch.vtsc_offset = get_s_time() - elapsed_nsec;
         d->arch.tsc_khz = gtsc_khz ?: cpu_khz;
-        set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000);
+        set_time_scale(&d->arch.vtsc_to_ns, d->arch.tsc_khz * 1000UL);
 
         /*
          * In default mode use native TSC if the host has safe TSC and