If Xen is virtualising MSR_SPEC_CTRL handling for guests, but using 0 as its
own MSR_SPEC_CTRL value, spec_ctrl_{enter,exit}_idle() need not write to the
MSR.
Requested-by: Jan Beulich <JBeulich@suse.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit:
94df6e8588e35cc2028ccb3fd2921c6e6360605e
master date: 2018-05-16 12:19:10 +0100
if (test_bit(X86_FEATURE_SC_RSB_HVM,
boot_cpu_data.x86_capability))
__set_bit(X86_FEATURE_SC_RSB_HVM, c->x86_capability);
+ if (test_bit(X86_FEATURE_SC_MSR_IDLE,
+ boot_cpu_data.x86_capability))
+ __set_bit(X86_FEATURE_SC_MSR_IDLE, c->x86_capability);
/* AND the already accumulated flags with these */
for ( i = 0 ; i < NCAPINTS ; i++ )
/* (Re)init BSP state now that default_spec_ctrl_flags has been calculated. */
init_shadow_spec_ctrl_state();
+ /* If Xen is using any MSR_SPEC_CTRL settings, adjust the idle path. */
+ if ( default_xen_spec_ctrl )
+ __set_bit(X86_FEATURE_SC_MSR_IDLE, boot_cpu_data.x86_capability);
+
print_details(thunk, caps);
}
#define X86_FEATURE_XTOPOLOGY (3*32+13) /* cpu topology enum extensions */
#define X86_FEATURE_CPUID_FAULTING (3*32+14) /* cpuid faulting */
#define X86_FEATURE_CLFLUSH_MONITOR (3*32+15) /* clflush reqd with monitor */
+#define X86_FEATURE_SC_MSR_IDLE (3*32+16) /* SC_MSR && default_xen_spec_ctrl */
/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
barrier();
asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", %c3)
:: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0),
- "i" (X86_FEATURE_SC_MSR)
+ "i" (X86_FEATURE_SC_MSR_IDLE)
: "memory" );
}
barrier();
asm volatile ( ALTERNATIVE(ASM_NOP3, "wrmsr", %c3)
:: "a" (val), "c" (MSR_SPEC_CTRL), "d" (0),
- "i" (X86_FEATURE_SC_MSR)
+ "i" (X86_FEATURE_SC_MSR_IDLE)
: "memory" );
}