#include "hw.h"
#include "pci.h"
#include "irq.h"
+#include "exec-all.h"
#include "qemu-xen.h"
#include <xenguest.h>
-extern FILE *logfile;
+static char log_buffer[4096];
+static int log_buffer_off;
#define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
}
case 8:
{
- static char log_buffer[4096];
- static int log_buffer_off;
if (val == '\n' || log_buffer_off == sizeof(log_buffer) - 1) {
/* Flush buffer */
log_buffer[log_buffer_off] = 0;
return 0;
}
+static void platform_fixed_ioport_write2(void *opaque, uint32_t addr, uint32_t val)
+{
+ switch (addr - 0x10) {
+ case 0:
+ /* Unplug devices. Value is a bitmask of which devices to
+ unplug, with bit 0 the IDE devices and bit 1 the network
+ devices. The other 14 are reserved. */
+ if (val & 1)
+ ide_unplug_harddisks();
+ if (val & 2) {
+ pci_unplug_netifs();
+ net_tap_shutdown_all();
+ }
+ break;
+ }
+}
+
+static uint32_t platform_fixed_ioport_read2(void *opaque, uint32_t addr)
+{
+ switch (addr - 0x10) {
+ case 0:
+ return 0x49d2; /* Magic value so that you can identify the
+ interface. */
+ default:
+ return 0xffff;
+ }
+}
+
+static void platform_fixed_ioport_write1(void *opaque, uint32_t addr, uint32_t val)
+{
+ switch (addr - 0x10) {
+ case 2:
+ /* Send bytes to syslog */
+ if (val == '\n' || log_buffer_off == sizeof(log_buffer) - 1) {
+ /* Flush buffer */
+ log_buffer[log_buffer_off] = 0;
+ fprintf(logfile, "%s\n", log_buffer);
+ log_buffer_off = 0;
+ break;
+ }
+ log_buffer[log_buffer_off++] = val;
+ break;
+ }
+}
+
+static uint32_t platform_fixed_ioport_read1(void *opaque, uint32_t addr)
+{
+ switch (addr - 0x10) {
+ case 2:
+ /* Version number */
+ return 0;
+ default:
+ return 0xff;
+ }
+}
+
void pci_xen_platform_init(PCIBus *bus)
{
PCIXenPlatformState *d;
register_savevm("platform", 0, 2, xen_pci_save, xen_pci_load, d);
printf("Done register platform.\n");
+ register_ioport_write(0x10, 16, 2, platform_fixed_ioport_write2, NULL);
+ register_ioport_write(0x10, 16, 1, platform_fixed_ioport_write1, NULL);
+ register_ioport_read(0x10, 16, 2, platform_fixed_ioport_read2, NULL);
+ register_ioport_read(0x10, 16, 1, platform_fixed_ioport_read1, NULL);
}