{
struct romfile_s *opregion = romfile_find("etc/igd-opregion");
u64 bdsm_size = le64_to_cpu(romfile_loadint("etc/igd-bdsm-size", 0));
- void *addr;
- u16 bdf = dev->bdf;
/* Apply OpRegion to any Intel VGA device, more than one is undefined */
if (opregion && opregion->size) {
- addr = memalign_high(PAGE_SIZE, opregion->size);
+ void *addr = memalign_high(PAGE_SIZE, opregion->size);
if (!addr) {
warn_noalloc();
return;
return;
}
- pci_config_writel(bdf, 0xFC, cpu_to_le32((u32)addr));
+ pci_config_writel(dev->bdf, 0xFC, cpu_to_le32((u32)addr));
- dprintf(1, "Intel IGD OpRegion enabled at 0x%08x, size %dKB, dev "
- "%02x:%02x.%x\n", (u32)addr, opregion->size >> 10,
- pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf));
+ dprintf(1, "Intel IGD OpRegion enabled at 0x%08x, size %dKB, dev %pP\n"
+ , (u32)addr, opregion->size >> 10, dev);
}
/* Apply BDSM only to Intel VGA at 00:02.0 */
- if (bdsm_size && (bdf == pci_to_bdf(0, 2, 0))) {
- addr = memalign_tmphigh(1024 * 1024, bdsm_size);
+ if (bdsm_size && (dev->bdf == pci_to_bdf(0, 2, 0))) {
+ void *addr = memalign_tmphigh(1024 * 1024, bdsm_size);
if (!addr) {
warn_noalloc();
return;
e820_add((u32)addr, bdsm_size, E820_RESERVED);
- pci_config_writel(bdf, 0x5C, cpu_to_le32((u32)addr));
+ pci_config_writel(dev->bdf, 0x5C, cpu_to_le32((u32)addr));
- dprintf(1, "Intel IGD BDSM enabled at 0x%08x, size %lldMB, dev "
- "00:02.0\n", (u32)addr, bdsm_size >> 20);
+ dprintf(1, "Intel IGD BDSM enabled at 0x%08x, size %lldMB, dev %pP\n"
+ , (u32)addr, bdsm_size >> 20, dev);
}
}