x86: keep state for both PICs

diff --git a/platform/hw/arch/x86/clock.c b/platform/hw/arch/x86/clock.c
index 4dbc8b00fad8e21f7e6439b369e8f737affafe7c..85fa723564ea245c2122dbeb88f33ac9dae81673 100644 (file)
--- a/platform/hw/arch/x86/clock.c
+++ b/platform/hw/arch/x86/clock.c
@@ -28,6 +28,7 @@
 #include <hw/clock_subr.h>
 
 #include <arch/x86/hypervisor.h>
+#include <arch/x86/var.h>
 
 #include <bmk-core/core.h>
 #include <bmk-core/platform.h>
@@ -432,10 +433,10 @@ x86_initclocks(void)
 
        /*
         * Map i8254 interrupt vector and enable it in the PIC.
-        * XXX: We don't really want to enable IRQ2 here, but ...
         */
        x86_fillgate(32, cpu_isr_clock, 0);
-       outb(PIC1_DATA, 0xff & ~(1<<2|1<<0));
+       pic1mask &= ~(1<<0);
+       outb(PIC1_DATA, pic1mask);
 }
 
 /*

diff --git a/platform/hw/arch/x86/cpu_subr.c b/platform/hw/arch/x86/cpu_subr.c
index adb7860420693dc34824019256e4bd6de856b300..ec46c8205d49ee588c8fb5042012ada7435348a4 100644 (file)
--- a/platform/hw/arch/x86/cpu_subr.c
+++ b/platform/hw/arch/x86/cpu_subr.c
@@ -24,6 +24,7 @@
  */
 
 #include <hw/kernel.h>
+#include <arch/x86/var.h>
 
 void x86_isr_9(void);
 void x86_isr_10(void);
@@ -31,14 +32,13 @@ void x86_isr_11(void);
 void x86_isr_14(void);
 void x86_isr_15(void);
 
-int pic2mask = 0xff;
+uint8_t pic1mask, pic2mask;
 
 int
 cpu_intr_init(int intr)
 {
 
-       /* XXX: too lazy to keep PIC1 state */
-       if (intr < 8)
+       if (intr > 15)
                return BMK_EGENERIC;
 
 #define FILLGATE(n) case n: x86_fillgate(32+n, x86_isr_##n, 0); break
@@ -54,8 +54,13 @@ cpu_intr_init(int intr)
 #undef FILLGATE
 
        /* unmask interrupt in PIC */
-       pic2mask &= ~(1<<(intr-8));
-       outb(PIC2_DATA, pic2mask);
+       if (intr < 8) {
+               pic1mask &= ~(1<<intr);
+               outb(PIC1_DATA, pic1mask);
+       } else {
+               pic2mask &= ~(1<<(intr-8));
+               outb(PIC2_DATA, pic2mask);
+       }
 
        return 0;
 }

diff --git a/platform/hw/arch/x86/x86_subr.c b/platform/hw/arch/x86/x86_subr.c
index 7a56d367522a4f787f9d04a9d7ccb37dcc14e23f..b0a97a6fff9636ad78c567deee75a1269b37c7b3 100644 (file)
--- a/platform/hw/arch/x86/x86_subr.c
+++ b/platform/hw/arch/x86/x86_subr.c
@@ -24,6 +24,7 @@
  */
 
 #include <hw/kernel.h>
+#include <arch/x86/var.h>
 
 void
 x86_initpic(void)
@@ -32,18 +33,20 @@ x86_initpic(void)
        /*
         * init pic1: cycle is write to cmd followed by 3 writes to data
         */
+       pic1mask = 0xff & ~(1<<2);
        outb(PIC1_CMD, ICW1_INIT | ICW1_IC4);
        outb(PIC1_DATA, 32);    /* interrupts start from 32 in IDT */
        outb(PIC1_DATA, 1<<2);  /* slave is at IRQ2 */
        outb(PIC1_DATA, ICW4_8086);
-       outb(PIC1_DATA, 0xff & ~(1<<2));        /* unmask slave IRQ */
+       outb(PIC1_DATA, pic1mask);
 
        /* do the slave PIC */
+       pic2mask = 0xff;
        outb(PIC2_CMD, ICW1_INIT | ICW1_IC4);
        outb(PIC2_DATA, 32+8);  /* interrupts start from 40 in IDT */
        outb(PIC2_DATA, 2);     /* interrupt at irq 2 */
        outb(PIC2_DATA, ICW4_8086);
-       outb(PIC2_DATA, 0xff);  /* all masked */
+       outb(PIC2_DATA, pic2mask);
 }
 
 /* interrupt-not-service-routine */

diff --git a/platform/hw/include/arch/x86/var.h b/platform/hw/include/arch/x86/var.h
index fad53d98c708a9e839857e0c08f9533c2d744c68..878ae55186b018383eb7c96b8492d11a9663cb0b 100644 (file)
--- a/platform/hw/include/arch/x86/var.h
+++ b/platform/hw/include/arch/x86/var.h
@@ -24,4 +24,6 @@ void x86_trap_14(void);
 void x86_trap_17(void);
 
 void x86_cpuid(uint32_t, uint32_t *, uint32_t *, uint32_t *, uint32_t *);
+
+extern uint8_t pic1mask, pic2mask;
 #endif