static void omap_timer_tick(void *opaque)
{
- struct omap_mpu_timer_s *timer = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *timer = opaque;
omap_timer_sync(timer);
omap_timer_fire(timer);
static void omap_timer_clk_update(void *opaque, int line, int on)
{
- struct omap_mpu_timer_s *timer = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *timer = opaque;
omap_timer_sync(timer);
timer->rate = on ? omap_clk_getrate(timer->clk) : 0;
static uint64_t omap_mpu_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_mpu_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) opaque;
+ struct omap_mpu_timer_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
static uint64_t omap_wd_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_watchdog_timer_s *s = (struct omap_watchdog_timer_s *) opaque;
+ struct omap_watchdog_timer_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
static void omap_wd_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_watchdog_timer_s *s = (struct omap_watchdog_timer_s *) opaque;
+ struct omap_watchdog_timer_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
static uint64_t omap_os_timer_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_32khz_timer_s *s = (struct omap_32khz_timer_s *) opaque;
+ struct omap_32khz_timer_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 4) {
static void omap_os_timer_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_32khz_timer_s *s = (struct omap_32khz_timer_s *) opaque;
+ struct omap_32khz_timer_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 4) {
static uint64_t omap_ulpd_pm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint16_t ret;
if (size != 2) {
static void omap_ulpd_pm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
int64_t now, ticks;
int div, mult;
static const int bypass_div[4] = { 1, 2, 4, 4 };
static uint64_t omap_pin_cfg_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_pin_cfg_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint32_t diff;
if (size != 4) {
static uint64_t omap_id_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static uint64_t omap_mpui_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_mpui_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
static uint64_t omap_tipb_bridge_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) opaque;
+ struct omap_tipb_bridge_s *s = opaque;
if (size < 2) {
return omap_badwidth_read16(opaque, addr);
static void omap_tipb_bridge_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_tipb_bridge_s *s = (struct omap_tipb_bridge_s *) opaque;
+ struct omap_tipb_bridge_s *s = opaque;
if (size < 2) {
omap_badwidth_write16(opaque, addr, value);
static uint64_t omap_tcmi_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint32_t ret;
if (size != 4) {
static void omap_tcmi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
static uint64_t omap_dpll_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct dpll_ctl_s *s = (struct dpll_ctl_s *) opaque;
+ struct dpll_ctl_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
static void omap_dpll_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct dpll_ctl_s *s = (struct dpll_ctl_s *) opaque;
+ struct dpll_ctl_s *s = opaque;
uint16_t diff;
static const int bypass_div[4] = { 1, 2, 4, 4 };
int div, mult;
static uint64_t omap_clkm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
static void omap_clkm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint16_t diff;
omap_clk clk;
static const char *clkschemename[8] = {
static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
CPUState *cpu = CPU(s->cpu);
if (size != 2) {
static void omap_clkdsp_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
uint16_t diff;
if (size != 2) {
static void omap_mpuio_set(void *opaque, int line, int level)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
uint16_t prev = s->inputs;
if (level)
static uint64_t omap_mpuio_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t ret;
static void omap_mpuio_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t diff;
int ln;
static void omap_mpuio_onoff(void *opaque, int line, int on)
{
- struct omap_mpuio_s *s = (struct omap_mpuio_s *) opaque;
+ struct omap_mpuio_s *s = opaque;
s->clk = on;
if (on)
}
}
-static uint64_t omap_uwire_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_uwire_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_uwire_s *s = (struct omap_uwire_s *) opaque;
+ struct omap_uwire_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
static void omap_uwire_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_uwire_s *s = (struct omap_uwire_s *) opaque;
+ struct omap_uwire_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
}
}
-static uint64_t omap_pwl_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_pwl_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
static void omap_pwl_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
static void omap_pwl_clk_update(void *opaque, int line, int on)
{
- struct omap_pwl_s *s = (struct omap_pwl_s *) opaque;
+ struct omap_pwl_s *s = opaque;
s->clk = on;
omap_pwl_update(s);
omap_clk clk;
};
-static uint64_t omap_pwt_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_pwt_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_pwt_s *s = (struct omap_pwt_s *) opaque;
+ struct omap_pwt_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
static void omap_pwt_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_pwt_s *s = (struct omap_pwt_s *) opaque;
+ struct omap_pwt_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
printf("%s: conversion failed\n", __func__);
}
-static uint64_t omap_rtc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_rtc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_rtc_s *s = (struct omap_rtc_s *) opaque;
+ struct omap_rtc_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint8_t i;
static void omap_rtc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_rtc_s *s = (struct omap_rtc_s *) opaque;
+ struct omap_rtc_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
struct tm new_tm;
time_t ti[2];
static void omap_mcbsp_source_tick(void *opaque)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
static const int bps[8] = { 0, 1, 1, 2, 2, 2, -255, -255 };
if (!s->rx_rate)
static void omap_mcbsp_sink_tick(void *opaque)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
static const int bps[8] = { 0, 1, 1, 2, 2, 2, -255, -255 };
if (!s->tx_rate)
static uint64_t omap_mcbsp_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t ret;
static void omap_mcbsp_writeh(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
switch (offset) {
static void omap_mcbsp_writew(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (offset == 0x04) { /* DXR */
static void omap_mcbsp_i2s_swallow(void *opaque, int line, int level)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
if (s->rx_rate) {
s->rx_req = s->codec->in.len;
static void omap_mcbsp_i2s_start(void *opaque, int line, int level)
{
- struct omap_mcbsp_s *s = (struct omap_mcbsp_s *) opaque;
+ struct omap_mcbsp_s *s = opaque;
if (s->tx_rate) {
s->tx_req = s->codec->out.size;
omap_lpg_update(s);
}
-static uint64_t omap_lpg_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_lpg_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_lpg_s *s = (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
static void omap_lpg_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_lpg_s *s = (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 1) {
static void omap_lpg_clk_update(void *opaque, int line, int on)
{
- struct omap_lpg_s *s = (struct omap_lpg_s *) opaque;
+ struct omap_lpg_s *s = opaque;
s->clk = on;
omap_lpg_update(s);
/* General chip reset */
static void omap1_mpu_reset(void *opaque)
{
- struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu = opaque;
omap_dma_reset(mpu->dma);
omap_mpu_timer_reset(mpu->timer[0]);
void omap_mpu_wakeup(void *opaque, int irq, int req)
{
- struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu = opaque;
CPUState *cpu = CPU(mpu->cpu);
if (cpu->halted) {
static void omap_eac_in_cb(void *opaque, int avail_b)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
s->codec.rxavail = avail_b >> 2;
omap_eac_in_refill(s);
static void omap_eac_out_cb(void *opaque, int free_b)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
s->codec.txavail = free_b >> 2;
if (s->codec.txlen)
omap_eac_interrupt_update(s);
}
-static uint64_t omap_eac_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_eac_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
uint32_t ret;
if (size != 2) {
static void omap_eac_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_eac_s *s = (struct omap_eac_s *) opaque;
+ struct omap_eac_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, addr, value);
static uint64_t omap_sti_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_sti_s *s = (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_sti_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sti_s *s = (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
.endianness = DEVICE_NATIVE_ENDIAN,
};
-static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_sti_fifo_read(void *opaque, hwaddr addr, unsigned size)
{
OMAP_BAD_REG(addr);
return 0;
static void omap_sti_fifo_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sti_s *s = (struct omap_sti_s *) opaque;
+ struct omap_sti_s *s = opaque;
int ch = addr >> 6;
uint8_t byte = value;
static uint64_t omap_prcm_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_prcm_s *s = (struct omap_prcm_s *) opaque;
+ struct omap_prcm_s *s = opaque;
uint32_t ret;
if (size != 4) {
static void omap_prcm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_prcm_s *s = (struct omap_prcm_s *) opaque;
+ struct omap_prcm_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
static uint32_t omap_sysctl_read8(void *opaque, hwaddr addr)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
int pad_offset, byte_offset;
int value;
static uint32_t omap_sysctl_read(void *opaque, hwaddr addr)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
switch (addr) {
case 0x000: /* CONTROL_REVISION */
return 0;
}
-static void omap_sysctl_write8(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_sysctl_write8(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
int pad_offset, byte_offset;
int prev_value;
}
}
-static void omap_sysctl_write(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_sysctl_write(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_sysctl_s *s = (struct omap_sysctl_s *) opaque;
+ struct omap_sysctl_s *s = opaque;
switch (addr) {
case 0x000: /* CONTROL_REVISION */
/* General chip reset */
static void omap2_mpu_reset(void *opaque)
{
- struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *mpu = opaque;
omap_dma_reset(mpu->dma);
omap_prcm_reset(mpu->prcm);
static uint64_t static_read(void *opaque, hwaddr offset,
unsigned size)
{
- uint32_t *val = (uint32_t *) opaque;
+ uint32_t *val = opaque;
uint32_t mask = (4 / size) - 1;
return *val >> ((offset & mask) << 3);
static void palmte_button_event(void *opaque, int keycode)
{
- struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *cpu = opaque;
if (palmte_keymap[keycode & 0x7f].row != -1)
omap_mpuio_key(cpu->mpuio,
return s;
}
-static uint64_t omap_uart_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_uart_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_uart_s *s = (struct omap_uart_s *) opaque;
+ struct omap_uart_s *s = opaque;
if (size == 4) {
return omap_badwidth_read8(opaque, addr);
static void omap_uart_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_uart_s *s = (struct omap_uart_s *) opaque;
+ struct omap_uart_s *s = opaque;
if (size == 4) {
omap_badwidth_write8(opaque, addr, value);
static uint64_t omap_diss_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_diss_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
static uint64_t omap_disc_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_disc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
omap_dispc_interrupt_update(s);
}
-static uint64_t omap_rfbi_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_rfbi_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_rfbi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dss_s *s = (struct omap_dss_s *) opaque;
+ struct omap_dss_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
static void omap_update_display(void *opaque)
{
- struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *omap_lcd = opaque;
DisplaySurface *surface;
drawfn draw_line;
int size, height, first, last;
}
}
-static uint64_t omap_lcdc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_lcdc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *s = opaque;
switch (addr) {
case 0x00: /* LCD_CONTROL */
static void omap_lcdc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
+ struct omap_lcd_panel_s *s = opaque;
switch (addr) {
case 0x00: /* LCD_CONTROL */
return 0;
}
-static uint64_t omap_dma_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_dma_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int reg, ch;
uint16_t ret;
static void omap_dma_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int reg, ch;
if (size != 2) {
static void omap_dma_request(void *opaque, int drq, int req)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
/* The request pins are level triggered in QEMU. */
if (req) {
if (~s->dma->drqbmp & (1ULL << drq)) {
/* XXX: this won't be needed once soc_dma knows about clocks. */
static void omap_dma_clk_update(void *opaque, int line, int on)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int i;
s->dma->freq = omap_clk_getrate(s->clk);
static uint64_t omap_dma4_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int irqn = 0, chnum;
struct omap_dma_channel_s *ch;
static void omap_dma4_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_dma_s *s = (struct omap_dma_s *) opaque;
+ struct omap_dma_s *s = opaque;
int chnum, irqn = 0;
struct omap_dma_channel_s *ch;
static uint64_t omap_gpio_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpio_s *s = (struct omap_gpio_s *) opaque;
+ struct omap_gpio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
if (size != 2) {
static void omap_gpio_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpio_s *s = (struct omap_gpio_s *) opaque;
+ struct omap_gpio_s *s = opaque;
int offset = addr & OMAP_MPUI_REG_MASK;
uint16_t diff;
int ln;
static uint32_t omap2_gpio_module_read(void *opaque, hwaddr addr)
{
- struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque;
+ struct omap2_gpio_s *s = opaque;
switch (addr) {
case 0x00: /* GPIO_REVISION */
static void omap2_gpio_module_write(void *opaque, hwaddr addr,
uint32_t value)
{
- struct omap2_gpio_s *s = (struct omap2_gpio_s *) opaque;
+ struct omap2_gpio_s *s = opaque;
uint32_t diff;
int ln;
s->gpo = 0;
}
-static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap2_gpif_top_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque;
+ struct omap2_gpif_s *s = opaque;
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
static void omap2_gpif_top_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap2_gpif_s *s = (struct omap2_gpif_s *) opaque;
+ struct omap2_gpif_s *s = opaque;
switch (addr) {
case 0x00: /* IPGENERICOCPSPL_REVISION */
static void omap_set_intr(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *ih = opaque;
uint32_t rise;
struct omap_intr_handler_bank_s *bank = &ih->bank[irq >> 5];
/* Simplified version with no edge detection */
static void omap_set_intr_noedge(void *opaque, int irq, int req)
{
- struct omap_intr_handler_s *ih = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *ih = opaque;
uint32_t rise;
struct omap_intr_handler_bank_s *bank = &ih->bank[irq >> 5];
static uint64_t omap_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int i, offset = addr;
int bank_no = offset >> 8;
int line_no;
static void omap_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int i, offset = addr;
int bank_no = offset >> 8;
struct omap_intr_handler_bank_s *bank = &s->bank[bank_no];
static uint64_t omap2_inth_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = NULL;
static void omap2_inth_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_intr_handler_s *s = (struct omap_intr_handler_s *) opaque;
+ struct omap_intr_handler_s *s = opaque;
int offset = addr;
int bank_no, line_no;
struct omap_intr_handler_bank_s *bank = NULL;
static uint64_t omap_nand_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_cs_file_s *f = (struct omap_gpmc_cs_file_s *)opaque;
+ struct omap_gpmc_cs_file_s *f = opaque;
uint64_t v;
nand_setpins(f->dev, 0, 0, 0, 1, 0);
switch (omap_gpmc_devsize(f)) {
static void omap_nand_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_cs_file_s *f = (struct omap_gpmc_cs_file_s *)opaque;
+ struct omap_gpmc_cs_file_s *f = opaque;
nand_setpins(f->dev, 0, 0, 0, 1, 0);
omap_nand_setio(f->dev, value, omap_gpmc_devsize(f), size);
}
static uint64_t omap_gpmc_prefetch_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
uint32_t data;
if (s->prefetch.config1 & 1) {
/* The TRM doesn't define the behaviour if you read from the
static void omap_gpmc_prefetch_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
int cs = prefetch_cs(s->prefetch.config1);
if ((s->prefetch.config1 & 1) == 0) {
/* The TRM doesn't define the behaviour of writing to the
static uint64_t omap_gpmc_read(void *opaque, hwaddr addr,
unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
int cs;
struct omap_gpmc_cs_file_s *f;
static void omap_gpmc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_gpmc_s *s = (struct omap_gpmc_s *) opaque;
+ struct omap_gpmc_s *s = opaque;
int cs;
struct omap_gpmc_cs_file_s *f;
return ta->start[region].size;
}
-static uint64_t omap_l4ta_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_l4ta_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
+ struct omap_target_agent_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, addr);
static void omap_l4ta_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_target_agent_s *s = (struct omap_target_agent_s *) opaque;
+ struct omap_target_agent_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
s->config = 0x10;
}
-static uint64_t omap_sdrc_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_sdrc_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
+ struct omap_sdrc_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
static void omap_sdrc_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_sdrc_s *s = (struct omap_sdrc_s *) opaque;
+ struct omap_sdrc_s *s = opaque;
if (size != 4) {
omap_badwidth_write32(opaque, addr, value);
#include "hw/arm/omap.h"
/* TEST-Chip-level TAP */
-static uint64_t omap_tap_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_tap_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ struct omap_mpu_state_s *s = opaque;
if (size != 4) {
return omap_badwidth_read32(opaque, addr);
device_cold_reset(DEVICE(host->card));
}
-static uint64_t omap_mmc_read(void *opaque, hwaddr offset,
- unsigned size)
+static uint64_t omap_mmc_read(void *opaque, hwaddr offset, unsigned size)
{
uint16_t i;
- struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *s = opaque;
if (size != 2) {
return omap_badwidth_read16(opaque, offset);
uint64_t value, unsigned size)
{
int i;
- struct omap_mmc_s *s = (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *s = opaque;
if (size != 2) {
omap_badwidth_write16(opaque, offset, value);
static void omap_mmc_cover_cb(void *opaque, int line, int level)
{
- struct omap_mmc_s *host = (struct omap_mmc_s *) opaque;
+ struct omap_mmc_s *host = opaque;
if (!host->cdet_state && level) {
host->status |= 0x0002;
omap_mcspi_interrupt_update(s);
}
-static uint64_t omap_mcspi_read(void *opaque, hwaddr addr,
- unsigned size)
+static uint64_t omap_mcspi_read(void *opaque, hwaddr addr, unsigned size)
{
- struct omap_mcspi_s *s = (struct omap_mcspi_s *) opaque;
+ struct omap_mcspi_s *s = opaque;
int ch = 0;
uint32_t ret;
static void omap_mcspi_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- struct omap_mcspi_s *s = (struct omap_mcspi_s *) opaque;
+ struct omap_mcspi_s *s = opaque;
int ch = 0;
if (size != 4) {
static void omap_gp_timer_tick(void *opaque)
{
- struct omap_gp_timer_s *timer = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer = opaque;
if (!timer->ar) {
timer->st = 0;
static void omap_gp_timer_match(void *opaque)
{
- struct omap_gp_timer_s *timer = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer = opaque;
if (timer->trigger == gpt_trigger_both)
omap_gp_timer_trigger(timer);
static void omap_gp_timer_input(void *opaque, int line, int on)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
int trigger;
switch (s->capture) {
static void omap_gp_timer_clk_update(void *opaque, int line, int on)
{
- struct omap_gp_timer_s *timer = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *timer = opaque;
omap_gp_timer_sync(timer);
timer->rate = on ? omap_clk_getrate(timer->clk) : 0;
static uint32_t omap_gp_timer_readw(void *opaque, hwaddr addr)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
switch (addr) {
case 0x00: /* TIDR */
static uint32_t omap_gp_timer_readh(void *opaque, hwaddr addr)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
uint32_t ret;
if (addr & 2)
}
}
-static void omap_gp_timer_write(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_gp_timer_write(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
switch (addr) {
case 0x00: /* TIDR */
}
}
-static void omap_gp_timer_writeh(void *opaque, hwaddr addr,
- uint32_t value)
+static void omap_gp_timer_writeh(void *opaque, hwaddr addr, uint32_t value)
{
- struct omap_gp_timer_s *s = (struct omap_gp_timer_s *) opaque;
+ struct omap_gp_timer_s *s = opaque;
if (addr & 2)
omap_gp_timer_write(opaque, addr, (value << 16) | s->writeh);
static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
{
- struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
+ struct omap_synctimer_s *s = opaque;
switch (addr) {
case 0x00: /* 32KSYNCNT_REV */
static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
{
- struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
+ struct omap_synctimer_s *s = opaque;
uint32_t ret;
if (addr & 2)