x86/CPU: don't hard-code MTRR availability

In particular if we're running virtualized, the underlying hypervisor
(which may be another Xen) may not surface MTRRs, and offer PAT only.

Fixes: 5a281883cdc3 ("Hardcode many cpu features for x86/64 -- we know 64-bit")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>

diff --git a/xen/arch/x86/include/asm/cpufeature.h b/xen/arch/x86/include/asm/cpufeature.h
index 6935703e71f7b2c66f3c00380f86c10937096e33..05399fb9c9820ce001f05ab76a4de17ac0c3b92f 100644 (file)
--- a/xen/arch/x86/include/asm/cpufeature.h
+++ b/xen/arch/x86/include/asm/cpufeature.h
@@ -70,7 +70,7 @@ static inline bool boot_cpu_has(unsigned int feat)
 #define cpu_has_pse             1
 #define cpu_has_apic            boot_cpu_has(X86_FEATURE_APIC)
 #define cpu_has_sep             boot_cpu_has(X86_FEATURE_SEP)
-#define cpu_has_mtrr            1
+#define cpu_has_mtrr            boot_cpu_has(X86_FEATURE_MTRR)
 #define cpu_has_pge             1
 #define cpu_has_pse36           boot_cpu_has(X86_FEATURE_PSE36)
 #define cpu_has_clflush         boot_cpu_has(X86_FEATURE_CLFLUSH)