dprintf(3, "handle_csm regs %p AX=%04x\n", regs, regs->ax);
+ code_mutable_preinit();
pic_irqmask_write(PICMask);
switch(regs->ax) {
if (vendor == PCI_VENDOR_ID_INTEL
&& device == PCI_DEVICE_ID_INTEL_82441) {
make_bios_writable_intel(bdf, I440FX_PAM0);
+ code_mutable_preinit();
ShadowBDF = bdf;
return;
}
if (vendor == PCI_VENDOR_ID_INTEL
&& device == PCI_DEVICE_ID_INTEL_Q35_MCH) {
make_bios_writable_intel(bdf, Q35_HOST_BRIDGE_PAM0);
+ code_mutable_preinit();
ShadowBDF = bdf;
return;
}
signature, base);
if (strcmp(signature, "XenVMMXenVMM") == 0) {
/* Set debug_io_port first, so the following messages work. */
+ code_mutable_preinit();
DebugOutputPort = 0xe9;
debug_banner();
dprintf(1, "\nFound Xen hypervisor signature at %x\n", base);
{
dprintf(3, "init ivt\n");
- // Setup reset-vector entry point (controls legacy reboots).
- HaveRunPost = 1;
- rtc_write(CMOS_RESET_CODE, 0);
-
// Initialize all vectors to the default handler.
int i;
for (i=0; i<256; i++)
func(arg);
}
+// Runs after all code is present and prior to any modifications
+void
+code_mutable_preinit(void)
+{
+ if (HaveRunPost)
+ // Already run
+ return;
+ // Setup reset-vector entry point (controls legacy reboots).
+ rtc_write(CMOS_RESET_CODE, 0);
+ barrier();
+ HaveRunPost = 1;
+ barrier();
+}
+
// Setup for code relocation and then relocate.
void VISIBLE32INIT
dopost(void)
{
+ code_mutable_preinit();
+
// Detect ram and setup internal malloc.
qemu_preinit();
coreboot_preinit();
void prepareboot(void);
void startBoot(void);
void reloc_preinit(void *f, void *arg);
+void code_mutable_preinit(void);
// serial.c
void serial_setup(void);