]> xenbits.xensource.com Git - people/jgross/linux.git/commitdiff
dt-bindings: display: bridge: icn6211: Add support for external REFCLK
authorMarek Vasut <marex@denx.de>
Mon, 1 Aug 2022 13:17:46 +0000 (15:17 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 26 Aug 2022 11:54:52 +0000 (13:54 +0200)
The ICN6211 is capable of deriving its internal PLL clock from either
MIPI DSI HS clock, external REFCLK clock, or even internal oscillator.
Currently supported is only the first option. Document support for
external REFCLK clock input in addition to that.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220801131747.183041-1-marex@denx.de
Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml

index 4f0b7c71313c3c380b0451ad0da5225536700947..5fb54375aeb6615f204fcec5e795c9df0c1b7e94 100644 (file)
@@ -24,6 +24,15 @@ properties:
     maxItems: 1
     description: virtual channel number of a DSI peripheral
 
+  clock-names:
+    const: refclk
+
+  clocks:
+    maxItems: 1
+    description: |
+        Optional external clock connected to REF_CLK input.
+        The clock rate must be in 10..154 MHz range.
+
   enable-gpios:
     description: Bridge EN pin, chip is reset when EN is low.