bool_t __read_mostly ioapic_ack_new = 1;
bool_t __read_mostly ioapic_ack_forced = 0;
-#ifndef sis_apic_bug
-/*
- * Is the SiS APIC rmw bug present?
- * -1 = don't know, 0 = no, 1 = yes
- */
-s8 __read_mostly sis_apic_bug = -1;
-#endif
-
/*
* # of IRQ routing registers
*/
setup_ioapic_dest();
break;
case QUIRK_IOAPIC_BAD_REGSEL:
+ dprintk(XENLOG_WARNING,
+ "Domain 0 thinks that IO-APIC REGSEL is bad\n");
+ break;
case QUIRK_IOAPIC_GOOD_REGSEL:
-#ifndef sis_apic_bug
- sis_apic_bug = (quirk_id == QUIRK_IOAPIC_BAD_REGSEL);
- dprintk(XENLOG_INFO, "Domain 0 says that IO-APIC REGSEL is %s\n",
- sis_apic_bug ? "bad" : "good");
-#else
- if ( sis_apic_bug != (quirk_id == QUIRK_IOAPIC_BAD_REGSEL) )
- dprintk(XENLOG_WARNING,
- "Domain 0 thinks that IO-APIC REGSEL is %s\n",
- sis_apic_bug ? "good" : "bad");
-#endif
break;
default:
ret = -EINVAL;
/*
* Re-write a value: to be used for read-modify-write
* cycles where the read already set up the index register.
- *
- * Older SiS APIC requires we rewrite the index regiser
*/
-#define sis_apic_bug 0
static inline void io_apic_modify(unsigned int apic, unsigned int reg, unsigned int value)
{
if (ioapic_reg_remapped(reg))
return iommu_update_ire_from_apic(apic, reg, value);
- if (sis_apic_bug)
- *IO_APIC_BASE(apic) = reg;
*(IO_APIC_BASE(apic)+4) = value;
}