/* Setup Hyp vector base */
WRITE_SYSREG((vaddr_t)hyp_traps_vector, VBAR_EL2);
+ /* Trap CP15 c15 used for implementation defined registers */
+ WRITE_SYSREG(HSTR_T(15), HSTR_EL2);
+
/* Trap all coprocessor registers (0-13) except cp10 and cp11 for VFP
* /!\ All processors except cp10 and cp11 cannot be used in Xen
*/
#define HSCTLR p15,4,c1,c0,0 /* Hyp. System Control Register */
#define HCR p15,4,c1,c1,0 /* Hyp. Configuration Register */
#define HCPTR p15,4,c1,c1,2 /* Hyp. Coprocessor Trap Register */
+#define HSTR p15,4,c1,c1,3 /* Hyp. System Trap Register */
/* CP15 CR2: Translation Table Base and Control Registers */
#define TTBCR p15,0,c2,c0,2 /* Translatation Table Base Control Register */
#define FAR_EL2 HIFAR
#define HCR_EL2 HCR
#define HPFAR_EL2 HPFAR
+#define HSTR_EL2 HSTR
#define ID_AFR0_EL1 ID_AFR0
#define ID_DFR0_EL1 ID_DFR0
#define ID_ISAR0_EL1 ID_ISAR0
#define HCPTR_CP(x) ((_AC(1,U)<<(x))) /* Trap Coprocessor x */
#define HCPTR_CP_MASK ((_AC(1,U)<<14)-1)
+/* HSTR Hyp. System Trap Register */
+#define HSTR_T(x) ((_AC(1,U)<<(x))) /* Trap Cp15 c<x> */
+
#define HSR_EC_UNKNOWN 0x00
#define HSR_EC_WFI_WFE 0x01
#define HSR_EC_CP15_32 0x03