]> xenbits.xensource.com Git - qemu-xen.git/commitdiff
target/hppa: Fix 64-bit SHRPD instruction
authorHelge Deller <deller@gmx.de>
Fri, 17 Nov 2023 10:02:39 +0000 (11:02 +0100)
committerHelge Deller <deller@gmx.de>
Fri, 17 Nov 2023 17:36:36 +0000 (18:36 +0100)
When shifting the two joined 64-bit registers right, shift the upper
64-bit register to the left and the lower 64-bit register to the right
before merging them with OR.

Signed-off-by: Helge Deller <deller@gmx.de>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
target/hppa/translate.c

index 4a4830c3e3a6b15c966b5b0641fd7f172fb169de..3ef39b1bd74679db49de9edf9565a0e3bb705858 100644 (file)
@@ -3438,9 +3438,9 @@ static bool trans_shrp_sar(DisasContext *ctx, arg_shrp_sar *a)
             TCGv_i64 n = tcg_temp_new_i64();
 
             tcg_gen_xori_i64(n, cpu_sar, 63);
-            tcg_gen_shl_i64(t, src2, n);
+            tcg_gen_shl_i64(t, src1, n);
             tcg_gen_shli_i64(t, t, 1);
-            tcg_gen_shr_i64(dest, src1, cpu_sar);
+            tcg_gen_shr_i64(dest, src2, cpu_sar);
             tcg_gen_or_i64(dest, dest, t);
         } else {
             TCGv_i64 t = tcg_temp_new_i64();