TLB address wraparound hopefully fixed now.

diff --git a/target-mips/TODO b/target-mips/TODO
index e162ea5295b3448b6ed38c45e9aa0fd3195c3d10..13ae2a93d02cdc321eeca515c4b6256fb6879bc9 100644 (file)
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -3,7 +3,6 @@ Unsolved issues/bugs in the mips/mipsel backend
 
 General
 -------
-- TLB fails cornercase at address wrap around
 - [ls][dw][lr] report broken (aligned) BadVAddr
 - Missing per-CPU instruction decoding, currently all implemented
   instructions are regarded as valid