* Rank containing GICD_<FOO><n> for GICD_<FOO> with
* <b>-bits-per-interrupt
*/
-static inline int REG_RANK_NR(int b, uint32_t n)
+static inline unsigned int REG_RANK_NR(unsigned int b, unsigned int n)
{
switch ( b )
{
extern void vgic_init_pending_irq(struct pending_irq *p, unsigned int virq);
extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq);
extern struct pending_irq *spi_to_pending(struct domain *d, unsigned int irq);
-extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n, int s);
+extern struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v,
+ unsigned int b,
+ unsigned int n,
+ unsigned int s);
extern struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq);
-extern void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n);
-extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n);
+extern void vgic_disable_irqs(struct vcpu *v, uint32_t r, unsigned int n);
+extern void vgic_enable_irqs(struct vcpu *v, uint32_t r, unsigned int n);
extern void vgic_set_irqs_pending(struct vcpu *v, uint32_t r,
unsigned int rank);
extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops);
{
struct hsr_dabt dabt = info->dabt;
struct vgic_irq_rank *rank;
- int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase);
+ /*
+ * gpa/dbase are paddr_t which size may be higher than 32-bit. Yet
+ * the difference will always be smaller than 32-bit.
+ */
+ unsigned int gicd_reg = info->gpa - v->domain->arch.vgic.dbase;
unsigned long flags;
perfc_incr(vgicd_reads);
{
struct hsr_dabt dabt = info->dabt;
struct vgic_irq_rank *rank;
- int gicd_reg = (int)(info->gpa - v->domain->arch.vgic.dbase);
+ /*
+ * gpa/dbase are paddr_t which size may be higher than 32-bit. Yet
+ * the difference will always be smaller than 32-bit.
+ */
+ unsigned int gicd_reg = info->gpa - v->domain->arch.vgic.dbase;
uint32_t tr;
unsigned long flags;
#include <asm/gic.h>
#include <asm/vgic.h>
-static inline struct vgic_irq_rank *vgic_get_rank(struct vcpu *v, int rank)
+static inline struct vgic_irq_rank *vgic_get_rank(struct vcpu *v,
+ unsigned int rank)
{
if ( rank == 0 )
return v->arch.vgic.private_irqs;
* Returns rank corresponding to a GICD_<FOO><n> register for
* GICD_<FOO> with <b>-bits-per-interrupt.
*/
-struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, int b, int n,
- int s)
+struct vgic_irq_rank *vgic_rank_offset(struct vcpu *v, unsigned int b,
+ unsigned int n, unsigned int s)
{
- int rank = REG_RANK_NR(b, (n >> s));
+ unsigned int rank = REG_RANK_NR(b, (n >> s));
return vgic_get_rank(v, rank);
}
struct vgic_irq_rank *vgic_rank_irq(struct vcpu *v, unsigned int irq)
{
- int rank = irq/32;
+ unsigned int rank = irq / 32;
return vgic_get_rank(v, rank);
}
}
}
-void vgic_disable_irqs(struct vcpu *v, uint32_t r, int n)
+void vgic_disable_irqs(struct vcpu *v, uint32_t r, unsigned int n)
{
const unsigned long mask = r;
struct pending_irq *p;
struct irq_desc *desc;
unsigned int irq;
unsigned long flags;
- int i = 0;
+ unsigned int i = 0;
struct vcpu *v_target;
/* LPIs will never be disabled via this function. */
#define VGIC_ICFG_MASK(intr) (1U << ((2 * ((intr) % 16)) + 1))
/* The function should be called with the rank lock taken */
-static inline unsigned int vgic_get_virq_type(struct vcpu *v, int n, int index)
+static inline unsigned int vgic_get_virq_type(struct vcpu *v,
+ unsigned int n,
+ unsigned int index)
{
struct vgic_irq_rank *r = vgic_get_rank(v, n);
uint32_t tr = r->icfg[index >> 4];
return IRQ_TYPE_LEVEL_HIGH;
}
-void vgic_enable_irqs(struct vcpu *v, uint32_t r, int n)
+void vgic_enable_irqs(struct vcpu *v, uint32_t r, unsigned int n)
{
const unsigned long mask = r;
struct pending_irq *p;
unsigned int irq;
unsigned long flags;
- int i = 0;
+ unsigned int i = 0;
struct vcpu *v_target;
struct domain *d = v->domain;