switch ( hsr.bits & HSR_CP64_REGS_MASK )
{
case HSR_CPREG64(CNTPCT):
+ case HSR_CPREG64(CNTP_CVAL):
if ( !vtimer_emulate(regs, hsr) )
goto undef_cp15_64;
break;
break;
case HSR_SYSREG_CNTP_CTL_EL0:
case HSR_SYSREG_CNTP_TVAL_EL0:
+ case HSR_SYSREG_CNTP_CVAL_EL0:
if ( !vtimer_emulate(regs, hsr) )
goto undef_sysreg;
break;
return 1;
}
+static int vtimer_cntp_cval(struct cpu_user_regs *regs, uint64_t *r, int read)
+{
+ struct vcpu *v = current;
+
+ if ( !ACCESS_ALLOWED(regs, EL0PTEN) )
+ return 0;
+
+ if ( read )
+ {
+ *r = ns_to_ticks(v->arch.phys_timer.cval);
+ }
+ else
+ {
+ v->arch.phys_timer.cval = ticks_to_ns(*r);
+ if ( v->arch.phys_timer.ctl & CNTx_CTL_ENABLE )
+ {
+ v->arch.phys_timer.ctl &= ~CNTx_CTL_PENDING;
+ set_timer(&v->arch.phys_timer.timer,
+ v->arch.phys_timer.cval +
+ v->domain->arch.phys_timer_base.offset);
+ }
+ }
+ return 1;
+}
static int vtimer_cntpct(struct cpu_user_regs *regs, uint64_t *r, int read)
{
struct vcpu *v = current;
struct hsr_cp64 cp64 = hsr.cp64;
uint32_t *r1 = (uint32_t *)select_user_reg(regs, cp64.reg1);
uint32_t *r2 = (uint32_t *)select_user_reg(regs, cp64.reg2);
- uint64_t x;
+ uint64_t x = (uint64_t)(*r1) | ((uint64_t)(*r2) << 32);
if ( cp64.read )
perfc_incr(vtimer_cp64_reads);
case HSR_CPREG64(CNTPCT):
if ( !vtimer_cntpct(regs, &x, cp64.read) )
return 0;
+ break;
- if ( cp64.read )
- {
- *r1 = (uint32_t)(x & 0xffffffff);
- *r2 = (uint32_t)(x >> 32);
- }
- return 1;
+ case HSR_CPREG64(CNTP_CVAL):
+ if ( !vtimer_cntp_cval(regs, &x, cp64.read) )
+ return 0;
+ break;
default:
return 0;
}
+
+ if ( cp64.read )
+ {
+ *r1 = (uint32_t)(x & 0xffffffff);
+ *r2 = (uint32_t)(x >> 32);
+ }
+
+ return 1;
}
#ifdef CONFIG_ARM_64
*x = r;
return 1;
+ case HSR_SYSREG_CNTP_CVAL_EL0:
+ return vtimer_cntp_cval(regs, x, sysreg.read);
+
case HSR_SYSREG_CNTPCT_EL0:
return vtimer_cntpct(regs, x, sysreg.read);
#define HSR_SYSREG_PMOVSSET_EL0 HSR_SYSREG(3,3,c9,c14,3)
#define HSR_SYSREG_CNTPCT_EL0 HSR_SYSREG(3,3,c14,c0,0)
-#define HSR_SYSREG_CNTP_CTL_EL0 HSR_SYSREG(3,3,c14,c2,1)
#define HSR_SYSREG_CNTP_TVAL_EL0 HSR_SYSREG(3,3,c14,c2,0)
+#define HSR_SYSREG_CNTP_CTL_EL0 HSR_SYSREG(3,3,c14,c2,1)
+#define HSR_SYSREG_CNTP_CVAL_EL0 HSR_SYSREG(3,3,c14,c2,2)
/*
* GIC System register assembly aliases picked from kernel