CHERRY-PICK: HACK: arm: exynos: Force 0.8x instead of bypass for VDD_INT

Increase the INT voltage margins for all speed groups. According to
the h/w guys at Samsung this is fine except for a power increase.  At
the moment this is considered an interrim (but safe) fix while Samsung
looks for a root cause.

Side notes:
* ABB 1.0x appears to work better than bypass (which makes no sense)
  but still doesn't work as well as ABB 0.8x (this patch).
* ABB 1.2x also appears to work.  It ran 690 cycles of the test below
  before I stopped it.
* Leaving ABB off and increasing VDD_INT also appears to work to some
  extent, but not as well as this patch.

BUG=chrome-os-partner:15327
TEST=Run the following test on a device that fails 100% without
  this patch:
  1. Reboot
  2. suspend_stress_test -c5 --backup_rtc
  3. Goto step 1
  With this patch I went through 728 cycles of the above with no
  hangs at suspend.  Testing was done via an init script that is
  attached at comment #71 of the referenced bug.
TEST=Run the above test on several devices that have no problems
  without this patch.  Confirm that this patch doesn't introduce
  additional suspend/resume problems.
TEST=General stability testing should be performed.

Change-Id: Ibe26b8e6805d7206b3d98ae2a72704ef9633eeb3
Original-Change-Id:  I5925ace16e7bc00207f2218c4ccb4cc6453ec44a
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Doug Anderson <dianders@chromium.org>
(cherry picked from commit 466db2af679e46c5ab65c53e38b802a1e4ae3351)

Reviewed-on: https://gerrit.chromium.org/gerrit/41958
Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org>

diff --git a/arch/arm/mach-exynos/asv-5250.c b/arch/arm/mach-exynos/asv-5250.c
index 508690d5cd9f10d1cc5009d455fef17260f20fc1..92053e8af6e652c2ff1b05415a15540572864bc1 100644 (file)
--- a/arch/arm/mach-exynos/asv-5250.c
+++ b/arch/arm/mach-exynos/asv-5250.c
@@ -279,7 +279,7 @@ static void exynos5250_pre_set_abb(void)
                        break;
                default:
                        exynos5250_set_abb_member(ABB_ARM, ABB_MODE_BYPASS);
-                       exynos5250_set_abb_member(ABB_INT, ABB_MODE_BYPASS);
+                       exynos5250_set_abb_member(ABB_INT, ABB_MODE_080);
                        exynos5250_set_abb_member(ABB_G3D, ABB_MODE_BYPASS);
                        break;
                }