x86/iommu: avoid mapping the interrupt address range for hwdom

Current code only prevent mapping the lapic page into the guest
physical memory map. Expand the range to be 0xFEEx_xxxx as described
in the Intel VTd specification section 3.13 "Handling Requests to
Interrupt Address Range".

AMD also lists this address range in the AMD SR5690 Databook, section
2.4.4 "MSI Interrupt Handling and MSI to HT Interrupt Conversion".

Requested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>

diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c
index a7438c9c253bea09a6b6c23cae261a4b5c83a5d1..fd05075bb5182282e19ddf04d7382d53a969ec1c 100644 (file)
--- a/xen/drivers/passthrough/x86/iommu.c
+++ b/xen/drivers/passthrough/x86/iommu.c
@@ -232,19 +232,9 @@ static bool __hwdom_init hwdom_iommu_map(const struct domain *d,
             return false;
     }
 
-    /*
-     * Check that it doesn't overlap with the LAPIC
-     * TODO: if the guest relocates the MMIO area of the LAPIC Xen should make
-     * sure there's nothing in the new address that would prevent trapping.
-     */
-    if ( has_vlapic(d) )
-    {
-        const struct vcpu *v;
-
-        for_each_vcpu(d, v)
-            if ( pfn == PFN_DOWN(vlapic_base_address(vcpu_vlapic(v))) )
-                return false;
-    }
+    /* Check that it doesn't overlap with the Interrupt Address Range. */
+    if ( pfn >= 0xfee00 && pfn <= 0xfeeff )
+        return false;
     /* ... or the IO-APIC */
     for ( i = 0; has_vioapic(d) && i < d->arch.hvm.nr_vioapics; i++ )
         if ( pfn == PFN_DOWN(domain_vioapic(d, i)->base_address) )